[PATCH 4.9 123/164] ARM: 8670/1: V7M: Do not corrupt vector table around v7m_invalidate_l1 call

From	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Newsgroups	linux.kernel
Subject	[PATCH 4.9 123/164] ARM: 8670/1: V7M: Do not corrupt vector table around v7m_invalidate_l1 call
Date	2017-05-23 23:40 +0200
Message-ID	<tKpH4-Fc-41@gated-at.bofh.it> (permalink)
References	<tKoBk-8ko-9@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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4.9-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Vladimir Murzin <vladimir.murzin@arm.com>

commit 6d80594936914e798b1b54b3bfe4bd68d8418966 upstream.

We save/restore registers around v7m_invalidate_l1 to address pointed
by r12, which is vector table, so the first eight entries are
overwritten with a garbage. We already have stack setup at that stage,
so use it to save/restore register.

Fixes: 6a8146f420be ("ARM: 8609/1: V7M: Add support for the Cortex-M7 processor")
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/arm/mm/proc-v7m.S |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -147,10 +147,10 @@ __v7m_setup_cont:
 
 	@ Configure caches (if implemented)
 	teq     r8, #0
-	stmneia	r12, {r0-r6, lr}	@ v7m_invalidate_l1 touches r0-r6
+	stmneia	sp, {r0-r6, lr}		@ v7m_invalidate_l1 touches r0-r6
 	blne	v7m_invalidate_l1
 	teq     r8, #0			@ re-evalutae condition
-	ldmneia	r12, {r0-r6, lr}
+	ldmneia	sp, {r0-r6, lr}
 
 	@ Configure the System Control Register to ensure 8-byte stack alignment
 	@ Note the STKALIGN bit is either RW or RAO.

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[PATCH 4.9 123/164] ARM: 8670/1: V7M: Do not corrupt vector table around v7m_invalidate_l1 call Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-05-23 23:40 +0200

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