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Groups > linux.kernel > #1648302
| From | sathyanarayanan.kuppuswamy@linux.intel.com |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 1/8] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index |
| Date | 2017-05-23 19:40 +0200 |
| Message-ID | <tKlWP-6kH-33@gated-at.bofh.it> (permalink) |
| References | <tKcqu-8q9-11@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
TMU interrupts are registered as a separate interrupt chip, and
hence it should start its interrupt index(BXTWC_TMU_IRQ) number
from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum
bxtwc_irqs_level2 and its index value is 11. Since this index
value is used when calculating .num_irqs of regmap_irq_chip_tmu,
it incorrectly reports number of irqs as 12 instead of actual
value of 1.
This patch fixes this issue by creating new enum of tmu irqs and
resetting its starting index to 0.
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
---
drivers/mfd/intel_soc_pmic_bxtwc.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
Changes since v1:
* Removed code from commit message.
Changes since v2:
* Rebased on top of latest release.
diff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c b/drivers/mfd/intel_soc_pmic_bxtwc.c
index 8c3cbf6..7cbaf1e 100644
--- a/drivers/mfd/intel_soc_pmic_bxtwc.c
+++ b/drivers/mfd/intel_soc_pmic_bxtwc.c
@@ -95,7 +95,10 @@ enum bxtwc_irqs_level2 {
BXTWC_GPIO0_IRQ,
BXTWC_GPIO1_IRQ,
BXTWC_CRIT_IRQ,
- BXTWC_TMU_IRQ,
+};
+
+enum bxtwc_irqs_tmu {
+ BXTWC_TMU_IRQ = 0,
};
static const struct regmap_irq bxtwc_regmap_irqs[] = {
--
2.7.4
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Re: [PATCH v2 3/8] thermal: intel_bxt_pmic_thermal: use first level PMIC thermal irq Zhang Rui <rui.zhang@intel.com> - 2017-05-23 08:30 +0200
Re: [PATCH v2 3/8] thermal: intel_bxt_pmic_thermal: use first level PMIC thermal irq Lee Jones <lee.jones@linaro.org> - 2017-05-23 09:30 +0200
[PATCH v3 7/8] mfd: intel_soc_pmic_bxtwc: use chained irqs for second level irq chips sathyanarayanan.kuppuswamy@linux.intel.com - 2017-05-23 19:40 +0200
[PATCH v3 3/8] thermal: intel_bxt_pmic_thermal: use first level PMIC thermal irq sathyanarayanan.kuppuswamy@linux.intel.com - 2017-05-23 19:40 +0200
[PATCH v3 2/8] mfd: intel_soc_pmic_bxtwc: remove thermal second level irqs sathyanarayanan.kuppuswamy@linux.intel.com - 2017-05-23 19:40 +0200
[PATCH v3 5/8] gpio: gpio-wcove: use first level PMIC GPIO irq sathyanarayanan.kuppuswamy@linux.intel.com - 2017-05-23 19:40 +0200
[PATCH v3 4/8] mfd: intel_soc_pmic_bxtwc: remove second level irq for gpio device sathyanarayanan.kuppuswamy@linux.intel.com - 2017-05-23 19:40 +0200
[PATCH v3 8/8] platform: x86: intel_bxtwc_tmu: remove first level irq unmask sathyanarayanan.kuppuswamy@linux.intel.com - 2017-05-23 19:40 +0200
[PATCH v3 1/8] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index sathyanarayanan.kuppuswamy@linux.intel.com - 2017-05-23 19:40 +0200
[PATCH v3 6/8] mfd: intel_soc_pmic_bxtwc: utilize devm_* functions in driver probe sathyanarayanan.kuppuswamy@linux.intel.com - 2017-05-23 19:40 +0200
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