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Groups > linux.kernel > #1649437
| From | Vladimir Murzin <vladimir.murzin@arm.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v5 6/7] ARM: NOMMU: Set ARM_DMA_MEM_BUFFERABLE for M-class cpus |
| Date | 2017-05-24 12:30 +0200 |
| Message-ID | <tKBIf-15d-27@gated-at.bofh.it> (permalink) |
| References | <tKBIe-15d-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Now, we have dedicated non-cacheable region for consistent DMA operations. However, that region can still be marked as bufferable by MPU, so it'd be safer to have barriers by default. M-class machines that didn't need it until now also likely won't need it in the future, therefore, we offer this as an option. Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Tested-by: Andras Szemzo <sza@esh.hu> Tested-by: Alexandre TORGUE <alexandre.torgue@st.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> --- arch/arm/mm/Kconfig | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index d731f28..f50bbda 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -1049,8 +1049,8 @@ config ARM_L1_CACHE_SHIFT default 5 config ARM_DMA_MEM_BUFFERABLE - bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K) && !CPU_V7 - default y if CPU_V6 || CPU_V6K || CPU_V7 + bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K || CPU_V7M) && !CPU_V7 + default y if CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M help Historically, the kernel has used strongly ordered mappings to provide DMA coherent memory. With the advent of ARMv7, mapping @@ -1065,6 +1065,10 @@ config ARM_DMA_MEM_BUFFERABLE and therefore turning this on may result in unpredictable driver behaviour. Therefore, we offer this as an option. + On some of the beefier ARMv7-M machines (with DMA and write + buffers) you likely want this enabled, while those that + didn't need it until now also won't need it in the future. + You are recommended say 'Y' here and debug any affected drivers. config ARM_HEAVY_MB -- 2.0.0
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[PATCH v5 0/7] ARM: Fix dma_alloc_coherent() and friends for NOMMU Vladimir Murzin <vladimir.murzin@arm.com> - 2017-05-24 12:30 +0200 [PATCH v5 6/7] ARM: NOMMU: Set ARM_DMA_MEM_BUFFERABLE for M-class cpus Vladimir Murzin <vladimir.murzin@arm.com> - 2017-05-24 12:30 +0200 [PATCH v5 2/7] dma: Add simple dma_noop_mmap Vladimir Murzin <vladimir.murzin@arm.com> - 2017-05-24 13:10 +0200 [PATCH v5 4/7] drivers: dma-coherent: Introduce default DMA pool Vladimir Murzin <vladimir.murzin@arm.com> - 2017-05-24 13:10 +0200 [PATCH v5 7/7] ARM: dma-mapping: Remove traces of NOMMU code Vladimir Murzin <vladimir.murzin@arm.com> - 2017-05-24 13:10 +0200 [PATCH v5 3/7] drivers: dma-coherent: Account dma_pfn_offset when used with device tree Vladimir Murzin <vladimir.murzin@arm.com> - 2017-05-24 13:10 +0200 [PATCH v5 5/7] ARM: NOMMU: Introduce dma operations for noMMU Vladimir Murzin <vladimir.murzin@arm.com> - 2017-05-24 13:10 +0200 [PATCH v5 1/7] dma: Take into account dma_pfn_offset Vladimir Murzin <vladimir.murzin@arm.com> - 2017-05-24 13:10 +0200
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