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Groups > linux.kernel > #1644671
| From | Robin Murphy <robin.murphy@arm.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH] coresight: tmc: Configure DMA mask appropriately |
| Date | 2017-05-18 17:20 +0200 |
| Message-ID | <tIvnz-4vr-13@gated-at.bofh.it> (permalink) |
| Organization | linux.* mail to news gateway |
Before making any DMA API calls, the ETR driver should really be setting
its masks to ensure that DMA is possible. Especially since it can
address more than the 32-bit default mask set by the AMBA bus code.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
drivers/hwtracing/coresight/coresight-tmc.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c
index d8517d2a968c..864488793f09 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.c
+++ b/drivers/hwtracing/coresight/coresight-tmc.c
@@ -362,6 +362,13 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
desc.type = CORESIGHT_DEV_TYPE_SINK;
desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
desc.ops = &tmc_etr_cs_ops;
+ /*
+ * ETR configuration uses a 40-bit AXI master in place of
+ * the embedded SRAM of ETB/ETF.
+ */
+ ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
+ if (ret)
+ goto out;
} else {
desc.type = CORESIGHT_DEV_TYPE_LINKSINK;
desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_FIFO;
--
2.12.2.dirty
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[PATCH] coresight: tmc: Configure DMA mask appropriately Robin Murphy <robin.murphy@arm.com> - 2017-05-18 17:20 +0200 Re: [PATCH] coresight: tmc: Configure DMA mask appropriately Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-05-19 15:30 +0200 Re: [PATCH] coresight: tmc: Configure DMA mask appropriately Mathieu Poirier <mathieu.poirier@linaro.org> - 2017-05-22 19:40 +0200
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