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Groups > linux.kernel > #1643534
| From | Bjorn Helgaas <helgaas@kernel.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v6 2/3] iommu/pci: reserve IOVA for PCI masters |
| Date | 2017-05-17 19:20 +0200 |
| Message-ID | <tIaM9-5Vz-19@gated-at.bofh.it> (permalink) |
| References | <tHDdv-1qC-3@gated-at.bofh.it> <tHDdw-1qC-17@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Tue, May 16, 2017 at 10:52:06AM +0530, Oza Pawandeep wrote: > this patch reserves the IOVA for PCI masters. > ARM64 based SOCs may have scattered memory banks. > such as iproc based SOC has > > <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */ > <0x00000008 0x80000000 0x3 0x80000000>, /* 14G @ 34G */ > <0x00000090 0x00000000 0x4 0x00000000>, /* 16G @ 576G */ > <0x000000a0 0x00000000 0x4 0x00000000>; /* 16G @ 640G */ > > but incoming PCI transcation addressing capability is limited s/transcation/transaction/ > by host bridge, for example if max incoming window capability > is 512 GB, then 0x00000090 and 0x000000a0 will fall beyond it. > > to address this problem, iommu has to avoid allocating IOVA which s/iommu/IOMMU/ > are reserved. which inturn does not allocate IOVA if it falls into hole. s/inturn/in turn/
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[PATCH v6 0/3] OF/PCI address PCI inbound memory limitations Oza Pawandeep <oza.oza@broadcom.com> - 2017-05-16 07:30 +0200
[PATCH v6 2/3] iommu/pci: reserve IOVA for PCI masters Oza Pawandeep <oza.oza@broadcom.com> - 2017-05-16 07:30 +0200
Re: [PATCH v6 2/3] iommu/pci: reserve IOVA for PCI masters Bjorn Helgaas <helgaas@kernel.org> - 2017-05-17 19:20 +0200
Re: [PATCH v6 2/3] iommu/pci: reserve IOVA for PCI masters Oza Oza <oza.oza@broadcom.com> - 2017-05-19 03:30 +0200
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