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Groups > linux.kernel > #1640187

[PATCH v2 3/3] irqchip/mbigen: Fix the clear register offset

From Hanjun Guo <guohanjun@huawei.com>
Newsgroups linux.kernel
Subject [PATCH v2 3/3] irqchip/mbigen: Fix the clear register offset
Date 2017-05-12 06:10 +0200
Message-ID <tGa3U-7oh-13@gated-at.bofh.it> (permalink)
References <tGa3T-7oh-3@gated-at.bofh.it>
Organization linux.* mail to news gateway

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From: MaJun <majun258@huawei.com>

Don't minus reserved interrupts (64) when get the clear
register offset, because the clear register space includes
the space of these 64 interrupts.

This bug wasn't discovered until we running the driver on
a new platform with an updated firmware. It turns out that
there is a timeout mechanism to clear the register in the
mbigen which is for debug purpose and should be turned off,
but because of configuration mistake in firmware, this
function was turned on and covered up the bug in clear offset
calculate, it's time to fix it now.

Fixes: a6c2f87b8820 ("irqchip/mbigen: Implement the mbigen irq chip operation functions")
Signed-off-by: MaJun <majun258@huawei.com>
Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
---
 drivers/irqchip/irq-mbigen.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c
index 2fa1e45..57a860c 100644
--- a/drivers/irqchip/irq-mbigen.c
+++ b/drivers/irqchip/irq-mbigen.c
@@ -106,10 +106,7 @@ static inline void get_mbigen_type_reg(irq_hw_number_t hwirq,
 static inline void get_mbigen_clear_reg(irq_hw_number_t hwirq,
 					u32 *mask, u32 *addr)
 {
-	unsigned int ofst;
-
-	hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP;
-	ofst = hwirq / 32 * 4;
+	unsigned int ofst = hwirq / 32 * 4;
 
 	*mask = 1 << (hwirq % 32);
 	*addr = ofst + REG_MBIGEN_CLEAR_OFFSET;
-- 
1.7.12.4

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Thread

[PATCH v2 0/3] irqchip/mbigen: bugfixs Hanjun Guo <guohanjun@huawei.com> - 2017-05-12 06:10 +0200
  [PATCH v2 2/3] irqchip/mbigen: Fix potential NULL dereferencing Hanjun Guo <guohanjun@huawei.com> - 2017-05-12 06:10 +0200
    [tip:irq/urgent] irqchip/mbigen: Fix potential NULL dereferencing tip-bot for Hanjun Guo <tipbot@zytor.com> - 2017-05-12 10:40 +0200
  [PATCH v2 3/3] irqchip/mbigen: Fix the clear register offset Hanjun Guo <guohanjun@huawei.com> - 2017-05-12 06:10 +0200
    [tip:irq/urgent] irqchip/mbigen: Fix the clear register offset  calculation tip-bot for MaJun <tipbot@zytor.com> - 2017-05-12 10:40 +0200
  [PATCH v2 1/3] irqchip/mbigen: Fix memory mapping code Hanjun Guo <guohanjun@huawei.com> - 2017-05-12 06:10 +0200
    [tip:irq/urgent] irqchip/mbigen: Fix memory mapping code tip-bot for Hanjun Guo <tipbot@zytor.com> - 2017-05-12 10:40 +0200
  Re: [PATCH v2 0/3] irqchip/mbigen: bugfixs "majun (Euler7)" <majun258@huawei.com> - 2017-05-12 09:00 +0200
  Re: [PATCH v2 0/3] irqchip/mbigen: bugfixs Marc Zyngier <marc.zyngier@arm.com> - 2017-05-12 10:00 +0200

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