Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1640123
| From | Len Brown <lenb@kernel.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH 2/5] x86: msr-index.h: define HWP.EPP values |
| Date | 2017-05-12 04:10 +0200 |
| Message-ID | <tG8bM-64j-15@gated-at.bofh.it> (permalink) |
| References | <tG8bM-64j-7@gated-at.bofh.it> |
| Organization | Intel Open Source Technology Center |
From: Len Brown <len.brown@intel.com> The Hardware Performance State request MSR has a field to express the "Energy Performance Preference" (HWP.EPP). Decode that field so the definition may be shared by by the intel_pstate driver and any utilities that decode the same register. Signed-off-by: Len Brown <len.brown@intel.com> --- arch/x86/include/asm/msr-index.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index a92d9bd154f6..50c0c3204a92 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -239,6 +239,10 @@ #define HWP_MAX_PERF(x) ((x & 0xff) << 8) #define HWP_DESIRED_PERF(x) ((x & 0xff) << 16) #define HWP_ENERGY_PERF_PREFERENCE(x) ((x & 0xff) << 24) +#define HWP_EPP_PERFORMANCE 0x00 +#define HWP_EPP_BALANCE_PERFORMANCE 0x80 +#define HWP_EPP_BALANCE_POWERSAVE 0xC0 +#define HWP_EPP_POWERSAVE 0xFF #define HWP_ACTIVITY_WINDOW(x) ((x & 0xff3) << 32) #define HWP_PACKAGE_CONTROL(x) ((x & 0x1) << 42) -- 2.11.0.161.g6610af872
Back to linux.kernel | Previous | Next — Previous in thread | Find similar | Unroll thread
[GIT PULL] power utilities update Len Brown <lenb@kernel.org> - 2017-05-12 04:10 +0200 [PATCH 2/5] x86: msr-index.h: define HWP.EPP values Len Brown <lenb@kernel.org> - 2017-05-12 04:10 +0200
csiph-web