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Groups > linux.kernel > #1638859
| From | Thomas Gleixner <tglx@linutronix.de> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | RE: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI |
| Date | 2017-05-10 16:00 +0200 |
| Message-ID | <tFAjM-1pF-13@gated-at.bofh.it> (permalink) |
| References | <tqmLM-87i-17@gated-at.bofh.it> <txCiK-7dQ-19@gated-at.bofh.it> <tER3k-4uz-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Mon, 8 May 2017, Liang, Kan wrote:
> Hi tglx,
>
> Are you OK with patch?
> Could I get your "acked-by"?
No.
> > > +static void flip_smm_bit(void *data)
> > > +{
> > > + bool set = *(int *)data;
data points to an unsigned long. So while this works on LE machines this is
still crap.
> > > + if (set) {
> > > + msr_set_bit(MSR_IA32_DEBUGCTLMSR,
> > > + DEBUGCTLMSR_FREEZE_IN_SMM_BIT);
> > > + } else {
> > > + msr_clear_bit(MSR_IA32_DEBUGCTLMSR,
> > > + DEBUGCTLMSR_FREEZE_IN_SMM_BIT);
> > > + }
I probably forgot, but why do we need an open coded version of __flip_bit()
instead of reusing that?
Thanks,
tglx
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RE: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI "Liang, Kan" <kan.liang@intel.com> - 2017-05-08 15:40 +0200
RE: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI Thomas Gleixner <tglx@linutronix.de> - 2017-05-10 16:00 +0200
RE: [PATCH V5] perf/x86: add sysfs entry to freeze counter on SMI "Liang, Kan" <kan.liang@intel.com> - 2017-05-10 17:50 +0200
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