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Groups > linux.kernel > #1631309
| From | <sean.wang@mediatek.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v2 03/30] arm: dts: mt7623: add clock controller device nodes |
| Date | 2017-04-26 11:50 +0200 |
| Message-ID | <tArKb-tv-47@gated-at.bofh.it> (permalink) |
| References | <tArK9-tv-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: John Crispin <john@phrozen.org>
Add clock controller nodes for MT7623, including topckgen, infracfg,
pericfg and apmixedsys. This patch also cleans up two oscillators that
provide clocks for MT7623. Switch the uart clocks to the real ones while
at it.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
---
arch/arm/boot/dts/mt7623.dtsi | 64 +++++++++++++++++++++++++++++++++++++------
1 file changed, 55 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 402579a..b97b2ba 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -14,6 +14,8 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/mt2701-clk.h>
+#include <dt-bindings/reset/mt2701-resets.h>
#include "skeleton64.dtsi"
/ {
@@ -53,16 +55,18 @@
#clock-cells = <0>;
};
- rtc_clk: dummy32k {
+ rtc32k: oscillator@1 {
compatible = "fixed-clock";
- clock-frequency = <32000>;
#clock-cells = <0>;
+ clock-frequency = <32000>;
+ clock-output-names = "rtc32k";
};
- uart_clk: dummy26m {
+ clk26m: oscillator@0 {
compatible = "fixed-clock";
- clock-frequency = <26000000>;
#clock-cells = <0>;
+ clock-frequency = <26000000>;
+ clock-output-names = "clk26m";
};
timer {
@@ -74,6 +78,32 @@
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
+ topckgen: syscon@10000000 {
+ compatible = "mediatek,mt7623-topckgen",
+ "mediatek,mt2701-topckgen",
+ "syscon";
+ reg = <0 0x10000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ infracfg: syscon@10001000 {
+ compatible = "mediatek,mt7623-infracfg",
+ "mediatek,mt2701-infracfg",
+ "syscon";
+ reg = <0 0x10001000 0 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ pericfg: syscon@10003000 {
+ compatible = "mediatek,mt7623-pericfg",
+ "mediatek,mt2701-pericfg",
+ "syscon";
+ reg = <0 0x10003000 0 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
watchdog: watchdog@10007000 {
compatible = "mediatek,mt7623-wdt",
"mediatek,mt6589-wdt";
@@ -85,7 +115,7 @@
"mediatek,mt6577-timer";
reg = <0 0x10008000 0 0x80>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&system_clk>, <&rtc_clk>;
+ clocks = <&system_clk>, <&rtc32k>;
clock-names = "system-clk", "rtc-clk";
};
@@ -98,6 +128,14 @@
reg = <0 0x10200100 0 0x1c>;
};
+ apmixedsys: syscon@10209000 {
+ compatible = "mediatek,mt7623-apmixedsys",
+ "mediatek,mt2701-apmixedsys",
+ "syscon";
+ reg = <0 0x10209000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
gic: interrupt-controller@10211000 {
compatible = "arm,cortex-a7-gic";
interrupt-controller;
@@ -114,7 +152,9 @@
"mediatek,mt6577-uart";
reg = <0 0x11002000 0 0x400>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&uart_clk>;
+ clocks = <&pericfg CLK_PERI_UART0_SEL>,
+ <&pericfg CLK_PERI_UART0>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -123,7 +163,9 @@
"mediatek,mt6577-uart";
reg = <0 0x11003000 0 0x400>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&uart_clk>;
+ clocks = <&pericfg CLK_PERI_UART1_SEL>,
+ <&pericfg CLK_PERI_UART1>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -132,7 +174,9 @@
"mediatek,mt6577-uart";
reg = <0 0x11004000 0 0x400>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&uart_clk>;
+ clocks = <&pericfg CLK_PERI_UART2_SEL>,
+ <&pericfg CLK_PERI_UART2>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -141,7 +185,9 @@
"mediatek,mt6577-uart";
reg = <0 0x11005000 0 0x400>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&uart_clk>;
+ clocks = <&pericfg CLK_PERI_UART3_SEL>,
+ <&pericfg CLK_PERI_UART3>;
+ clock-names = "baud", "bus";
status = "disabled";
};
};
--
1.9.1
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[PATCH v2 00/30] arm: dts: extend mt7623 support <sean.wang@mediatek.com> - 2017-04-26 11:50 +0200
[PATCH v2 03/30] arm: dts: mt7623: add clock controller device nodes <sean.wang@mediatek.com> - 2017-04-26 11:50 +0200
[PATCH v2 09/30] arm: dts: mt7623: add i2c nodes to the mt7623.dtsi file <sean.wang@mediatek.com> - 2017-04-26 11:50 +0200
[PATCH v2 21/30] arm: dts: mt7623: add efuse nodes to the mt7623.dtsi file <sean.wang@mediatek.com> - 2017-04-26 11:50 +0200
[PATCH v2 16/30] arm: dts: mt7623: add crypto engine nodes to the mt7623.dtsi file <sean.wang@mediatek.com> - 2017-04-26 11:50 +0200
[PATCH v2 20/30] arm: dts: mt7623: add auxadc nodes to the mt7623.dtsi file <sean.wang@mediatek.com> - 2017-04-26 11:50 +0200
[PATCH v2 29/30] dt-bindings: add vendor prefix for bananapi <sean.wang@mediatek.com> - 2017-04-26 11:50 +0200
Re: [PATCH v2 29/30] dt-bindings: add vendor prefix for bananapi Rob Herring <robh@kernel.org> - 2017-04-28 22:40 +0200
Re: [PATCH v2 29/30] dt-bindings: add vendor prefix for bananapi Sean Wang <sean.wang@mediatek.com> - 2017-05-01 09:00 +0200
Re: [PATCH v2 29/30] dt-bindings: add vendor prefix for bananapi Rob Herring <robh@kernel.org> - 2017-05-02 16:00 +0200
Re: [PATCH v2 29/30] dt-bindings: add vendor prefix for bananapi Sean Wang <sean.wang@mediatek.com> - 2017-05-08 12:00 +0200
Re: [PATCH v2 29/30] dt-bindings: add vendor prefix for bananapi Arnd Bergmann <arnd@arndb.de> - 2017-05-08 13:40 +0200
Re: [PATCH v2 29/30] dt-bindings: add vendor prefix for bananapi Matthias Brugger <matthias.bgg@gmail.com> - 2017-05-09 09:50 +0200
Re: [PATCH v2 29/30] dt-bindings: add vendor prefix for bananapi Chen-Yu Tsai <wens@csie.org> - 2017-05-09 10:10 +0200
Re: [PATCH v2 29/30] dt-bindings: add vendor prefix for bananapi Sean Wang <sean.wang@mediatek.com> - 2017-05-09 11:50 +0200
[PATCH v2 12/30] arm: dts: mt7623: add mmc nodes to the mt7623.dtsi file <sean.wang@mediatek.com> - 2017-04-26 11:50 +0200
[PATCH v2 10/30] arm: dts: mt7623: add spi nodes to the mt7623.dtsi file <sean.wang@mediatek.com> - 2017-04-26 11:50 +0200
[PATCH v2 30/30] arm: dts: mt7623: add dts file for Bananapi R2 (BPI-R2) board <sean.wang@mediatek.com> - 2017-04-26 11:50 +0200
[PATCH v2 05/30] arm: dts: mt7623: add power domain controller device node <sean.wang@mediatek.com> - 2017-04-26 11:50 +0200
[PATCH v2 04/30] arm: dts: mt7623: add subsystem clock controller device nodes <sean.wang@mediatek.com> - 2017-04-26 11:50 +0200
Re: [PATCH v2 02/30] pinctrl: mediatek: reuse pinctrl driver for mt7623 Linus Walleij <linus.walleij@linaro.org> - 2017-04-28 10:10 +0200
Re: [PATCH v2 02/30] pinctrl: mediatek: reuse pinctrl driver for mt7623 Sean Wang <sean.wang@mediatek.com> - 2017-05-01 08:50 +0200
Re: [PATCH v2 00/30] arm: dts: extend mt7623 support Matthias Brugger <matthias.bgg@gmail.com> - 2017-05-10 12:00 +0200
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