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Re: [PATCH v2] drm/mxsfb: fix pixel clock polarity

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On Wed, Feb 8, 2017 at 6:19 AM, Stefan Agner <stefan@agner.ch> wrote:
> On 2016-12-14 13:25, Marek Vasut wrote:
>> On 12/14/2016 09:48 PM, Stefan Agner wrote:
>>> The DRM subsystem specifies the pixel clock polarity from a
>>> controllers perspective: DRM_BUS_FLAG_PIXDATA_NEGEDGE means
>>> the controller drives the data on pixel clocks falling edge.
>>> That is the controllers DOTCLK_POL=0 (Default is data launched
>>> at negative edge).
>>>
>>> Also change the data enable logic to be high active by default
>>> and only change if explicitly requested via bus_flags. With
>>> that defaults are:
>>> - Data enable: high active
>>> - Pixel clock polarity: controller drives data on negative edge
>>>
>>> Signed-off-by: Stefan Agner <stefan@agner.ch>
>>
>> Acked-by: Marek Vasut <marex@denx.de>
>>
>
> This seems not have made into drm-next yet. Not sure what the plan is
> here, who will pick this up? There is also another fix on ML for the
> same driver ("drm: mxsfb: Fix crash when provided invalid DT bindings").

By default, driver maintainers are expected to pick up driver patches.
Exception is trivial patches by newcomers, to get them on board fast
(and avoid frustration when a maintainer isn't around). drm-misc and
Dave by default don't pick up anything.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

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Re: [PATCH v2] drm/mxsfb: fix pixel clock polarity Stefan Agner <stefan@agner.ch> - 2017-02-08 06:30 +0100
  Re: [PATCH v2] drm/mxsfb: fix pixel clock polarity Daniel Vetter <daniel@ffwll.ch> - 2017-02-08 08:30 +0100
    Re: [PATCH v2] drm/mxsfb: fix pixel clock polarity Marek Vasut <marex@denx.de> - 2017-02-08 12:20 +0100

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