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Re: [PATCH] gpio: dwapb: Add support for next generation of X-Gene SoC

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On Tue, Feb 7, 2017 at 1:49 AM, Hoan Tran <hotran@apm.com> wrote:
>> I wonder what is at addresses 0x08, 0x14, 0x20, 0x2c, 0x44?
>
> They are unused registers.
>  - 0x8, 0x14, 0x20, 0x2c are port data source registers.
>  - 0x44 is the raw interrupt status register.
>
>> Anything interesting we should know about? I bet they are not just
>> dead address space.

Sometimes they are (for example Synopsys DW DMA has few holes in address space).

>> Is there a public datasheet for this thing that I can look at?
>
> I don't know if they public this datasheet. You can register and
> download from here
> https://www.synopsys.com/dw/ipdir.php?c=DW_apb_gpio

Intel Quark x1000 SoC specification, which is public, at least sheds a
light on 0x44 (from above list). It has description of other used
registers (regarding to only one portA).

http://www.intel.me/content/www/xr/ar/embedded/products/quark/quark-x1000-datasheet.html

-- 
With Best Regards,
Andy Shevchenko

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[PATCH] gpio: dwapb: Add support for next generation of X-Gene SoC Hoan Tran <hotran@apm.com> - 2017-01-31 20:50 +0100
  Re: [PATCH] gpio: dwapb: Add support for next generation of X-Gene SoC Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-02-02 20:50 +0100
    Re: [PATCH] gpio: dwapb: Add support for next generation of X-Gene SoC Hoan Tran <hotran@apm.com> - 2017-02-03 02:20 +0100
  Re: [PATCH] gpio: dwapb: Add support for next generation of X-Gene SoC Linus Walleij <linus.walleij@linaro.org> - 2017-02-06 11:30 +0100
    Re: [PATCH] gpio: dwapb: Add support for next generation of X-Gene SoC Hoan Tran <hotran@apm.com> - 2017-02-07 00:50 +0100
      Re: [PATCH] gpio: dwapb: Add support for next generation of X-Gene SoC Andy Shevchenko <andy.shevchenko@gmail.com> - 2017-02-07 10:20 +0100
    Re: [PATCH] gpio: dwapb: Add support for next generation of X-Gene  SoC Jamie Iles <jamie@jamieiles.com> - 2017-02-13 10:40 +0100

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