Re: [PATCH 04/10] arm64: head.S: Enable EL1 (host) access to SPE when entered at EL2

From	Marc Zyngier <marc.zyngier@arm.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH 04/10] arm64: head.S: Enable EL1 (host) access to SPE when entered at EL2
Date	2017-02-01 17:30 +0100
Message-ID	<t65Xc-8e7-9@gated-at.bofh.it> (permalink)
References	<t4j8d-7uS-11@gated-at.bofh.it> <t4jhU-7ym-15@gated-at.bofh.it>
Organization	ARM Ltd

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On 27/01/17 18:07, Will Deacon wrote:
> The SPE architecture requires each exception level to enable access
> to the SPE controls for the exception level below it, since additional
> context-switch logic may be required to handle the buffer safely.
> 
> This patch allows EL1 (host) access to the SPE controls when entered at
> EL2.
> 
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Signed-off-by: Will Deacon <will.deacon@arm.com>

Definitely more readable than the initial version! ;-)

Acked-by: Marc Zyngier <marc.zyngier@arm.com>

	M.
-- 
Jazz is not dead. It just smells funny...

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Re: [PATCH 04/10] arm64: head.S: Enable EL1 (host) access to SPE when  entered at EL2 Marc Zyngier <marc.zyngier@arm.com> - 2017-02-01 17:30 +0100

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