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Re: [RFC v2 10/10] KVM: arm/arm64: Emulate the EL1 phys timer register access

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Hi Peter,

On Mon, Jan 30, 2017 at 12:26 PM, Peter Maydell
<peter.maydell@linaro.org> wrote:
> On 30 January 2017 at 17:08, Jintack Lim <jintack@cs.columbia.edu> wrote:
>> On Sun, Jan 29, 2017 at 10:44 AM, Marc Zyngier <marc.zyngier@arm.com> wrote:
>>> Shouldn't we take the ENABLE bit into account? The ARMv8 ARM version I
>>> have at hand (version h) seems to indicate that we should, but we should
>>> check with the latest and greatest...
>>
>> Thanks! I was not clear about this. I have ARM ARM version k, and it
>> says that 'When the value of the ENABLE bit is 0, the ISTATUS field is
>> UNKNOWN.' So I thought the istatus value doesn't matter if ENABLE is
>> 0, and just set istatus bit regardless of ENABLE bit. If this is not
>> what the manual meant, then I'm happy to fix this.
>
> It looks like the spec has been relaxed between the doc version
> that Marc was looking at and the current one. So it's OK for
> an implementation to either (a) set ISTATUS to 0 if ENABLE
> is 0, or (b) do what you've done and set ISTATUS according
> to the timer comparison whether ENABLE is clear or not
> (or even (c) set ISTATUS to a random value if ENABLE is clear,
> and other less likely choices).
> I think we should add a comment to note that it's architecturally
> UNKNOWN and we've made a choice for our implementation convenience.

Thanks for the clarification. I'll put a comment in v3.

>
> thanks
> -- PMM
>

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[RFC v2 10/10] KVM: arm/arm64: Emulate the EL1 phys timer register access Jintack Lim <jintack@cs.columbia.edu> - 2017-01-27 02:10 +0100
  Re: [RFC v2 10/10] KVM: arm/arm64: Emulate the EL1 phys timer register access Marc Zyngier <marc.zyngier@arm.com> - 2017-01-29 16:50 +0100
    Re: [RFC v2 10/10] KVM: arm/arm64: Emulate the EL1 phys timer  register access Jintack Lim <jintack@cs.columbia.edu> - 2017-01-30 18:10 +0100
      Re: [RFC v2 10/10] KVM: arm/arm64: Emulate the EL1 phys timer  register access Peter Maydell <peter.maydell@linaro.org> - 2017-01-30 18:30 +0100
        Re: [RFC v2 10/10] KVM: arm/arm64: Emulate the EL1 phys timer  register access Jintack Lim <jintack@cs.columbia.edu> - 2017-01-30 18:40 +0100
        Re: [RFC v2 10/10] KVM: arm/arm64: Emulate the EL1 phys timer  register access Marc Zyngier <marc.zyngier@arm.com> - 2017-01-30 18:50 +0100

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