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Re: [PATCHv5 0/5] Support for Marvell switches with integrated CPUs

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Hi Chris,
 
 On dim., janv. 29 2017, Chris Packham <Chris.Packham@alliedtelesis.co.nz> wrote:

> On 28/01/17 07:47, Stephen Boyd wrote:
>> On 01/27, Gregory CLEMENT wrote:
>>> Hi all,
>>>
>>>  On ven., janv. 27 2017, Chris Packham <chris.packham@alliedtelesis.co.nz> wrote:
>>>
>>>> The 98DX3236, 98DX3336 and 98DX4251 are a set of switch ASICs with
>>>> integrated CPUs. They CPU block is common within these product lines and
>>>> (as far as I can tell/have been told) is based on the Armada XP. There
>>>> are a few differences due to the fact they have to squeeze the CPU into
>>>> the same package as the switch.
>>>>
>>>> I've rebased this series against linux-pinctrl/devel to get access to
>>>> mvebu_mmio_mpp_ctrl. Everything else still applies cleanly to
>>>> v4.10.0-rc5.
>>>
>>> Just to let you know that I plan to apply the 3 arm patch once Chris
>>> will have sent the new series with the minor fixes I asked on patch 3.
>>>
>>> I already applied them in the for-next branch to benefit of some build
>>> test coverage.
>>>
>>> Stephen,
>>>
>>> you gave your Acked-by on the first patch, but don't you plan to apply
>>> it on the clk branch?
>>
>> It must have not been clear if I should apply it, hence the ack.
>> I'll apply it now.
>>
>
> Sorry my bad. I need all 5 together in one place to actually test the 
> series.

The 5 patches should be available soon (if it is not already the case),
in the linux-next branch.

The clk patch is already there, the 3 arm patch have been merged in my
mvebu/for-next branch, and the pinctrl patch is about to be merged in
the pinctrl/for-next branch.

Gregory

>
> I wasn't sure whether the series should go through mvebu with Acks from 
> clk and pinctrl or if things should go to the separate maintainers and 
> come together when they hit the main linux repo. Up until the latest 
> pinctrl change either approach would have worked.

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

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[PATCHv5 0/5] Support for Marvell switches with integrated CPUs Chris Packham <chris.packham@alliedtelesis.co.nz> - 2017-01-27 04:30 +0100
  [PATCHv5 5/5] arm: mvebu: Add device tree for db-dxbc2 and db-xc3-24g4xg boards Chris Packham <chris.packham@alliedtelesis.co.nz> - 2017-01-27 04:30 +0100
    Re: [PATCHv5 5/5] arm: mvebu: Add device tree for db-dxbc2 and db-xc3-24g4xg boards Gregory CLEMENT <gregory.clement@free-electrons.com> - 2017-01-27 17:50 +0100
  Re: [PATCHv5 0/5] Support for Marvell switches with integrated CPUs Gregory CLEMENT <gregory.clement@free-electrons.com> - 2017-01-27 17:50 +0100
    Re: [PATCHv5 0/5] Support for Marvell switches with integrated CPUs Gregory CLEMENT <gregory.clement@free-electrons.com> - 2017-01-27 18:00 +0100
    Re: [PATCHv5 0/5] Support for Marvell switches with integrated CPUs Stephen Boyd <sboyd@codeaurora.org> - 2017-01-27 20:00 +0100
      Re: [PATCHv5 0/5] Support for Marvell switches with integrated CPUs Chris Packham <Chris.Packham@alliedtelesis.co.nz> - 2017-01-29 21:40 +0100
        Re: [PATCHv5 0/5] Support for Marvell switches with integrated CPUs Gregory CLEMENT <gregory.clement@free-electrons.com> - 2017-01-30 15:50 +0100
          Re: [PATCHv5 0/5] Support for Marvell switches with integrated CPUs Chris Packham <Chris.Packham@alliedtelesis.co.nz> - 2017-01-30 21:30 +0100

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