Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > linux.kernel > #1570675

[PATCH 2/7] arm64: arch_timer: add dt binding for hisilicon-161010101 erratum

From Mark Rutland <mark.rutland@arm.com>
Newsgroups linux.kernel
Subject [PATCH 2/7] arm64: arch_timer: add dt binding for hisilicon-161010101 erratum
Date 2017-01-31 13:30 +0100
Message-ID <t5FJp-DW-43@gated-at.bofh.it> (permalink)
References <t5FJo-DW-9@gated-at.bofh.it>
Organization linux.* mail to news gateway

Show all headers | View raw


From: Ding Tianhong <dingtianhong@huawei.com>

This erratum describes a bug in logic outside the core, so MIDR can't be
used to identify its presence, and reading an SoC-specific revision
register from common arch timer code would be awkward.  So, describe it
in the device tree.

Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
---
 Documentation/devicetree/bindings/arm/arch_timer.txt | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt
index ad440a2..e926aea 100644
--- a/Documentation/devicetree/bindings/arm/arch_timer.txt
+++ b/Documentation/devicetree/bindings/arm/arch_timer.txt
@@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
   This also affects writes to the tval register, due to the implicit
   counter read.
 
+- hisilicon,erratum-161010101 : A boolean property. Indicates the
+  presence of Hisilicon erratum 161010101, which says that reading the
+  counters is unreliable in some cases, and reads may return a value 32
+  beyond the correct value. This also affects writes to the tval
+  registers, due to the implicit counter read.
+
 ** Optional properties:
 
 - arm,cpu-registers-not-fw-configured : Firmware does not initialize
-- 
1.9.1

Back to linux.kernel | Previous | NextPrevious in thread | Find similar | Unroll thread


Thread

[PATCH 0/7] arm64: arch_timer: work around Hisilicon erratum 161010101 Mark Rutland <mark.rutland@arm.com> - 2017-01-31 13:30 +0100
  [PATCH 3/7] arm64: arm_arch_timer: remove fsl-a008585 parameter Mark Rutland <mark.rutland@arm.com> - 2017-01-31 13:30 +0100
    Re: [PATCH 3/7] arm64: arm_arch_timer: remove fsl-a008585 parameter Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-01 11:10 +0100
  [PATCH 6/7] arm64: arch_timer: document Hisilicon erratum 161010101 Mark Rutland <mark.rutland@arm.com> - 2017-01-31 13:30 +0100
    Re: [PATCH 6/7] arm64: arch_timer: document Hisilicon erratum  161010101 Will Deacon <will.deacon@arm.com> - 2017-01-31 15:40 +0100
  [PATCH 5/7] arm64: arch_timer: work around Hisilicon erratum 161010101 Mark Rutland <mark.rutland@arm.com> - 2017-01-31 13:30 +0100
    Re: [PATCH 5/7] arm64: arch_timer: work around Hisilicon erratum  161010101 Mark Rutland <mark.rutland@arm.com> - 2017-02-02 19:50 +0100
    Re: [PATCH 5/7] arm64: arch_timer: work around Hisilicon erratum  161010101 Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-02 20:30 +0100
  [PATCH 1/7] arm64: docs: widen silicon-errata kconfig column Mark Rutland <mark.rutland@arm.com> - 2017-01-31 13:30 +0100
  [PATCH 7/7] arm64: arch timer: Add timer erratum property for Hip05-d02 and Hip06-d03 Mark Rutland <mark.rutland@arm.com> - 2017-01-31 13:30 +0100
  [PATCH 4/7] arm64: arch_timer: introduce generic errata handling infrastructure Mark Rutland <mark.rutland@arm.com> - 2017-01-31 13:30 +0100
    Re: [PATCH 4/7] arm64: arch_timer: introduce generic errata handling  infrastructure Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-01 11:20 +0100
    Re: [PATCH 4/7] arm64: arch_timer: introduce generic errata handling  infrastructure Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-02-01 11:20 +0100
  [PATCH 2/7] arm64: arch_timer: add dt binding for hisilicon-161010101 erratum Mark Rutland <mark.rutland@arm.com> - 2017-01-31 13:30 +0100

csiph-web