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Groups > linux.kernel > #1568719

[PATCH v5 3/13] mmc: sunxi: Always set signal delay to 0 for A64

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Experience have shown that the using the  autocalibration could severely
degrade the performances of the MMC bus.

Allwinner is using in its BSP a delay set to 0 for all the modes but HS400.
Remove the calibration code for now, and add comments to document our
findings.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
---
 drivers/mmc/host/sunxi-mmc.c | 50 ++++++++++++-------------------------
 1 file changed, 17 insertions(+), 33 deletions(-)

diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index 019f95e8e7c5..b9c8a62bc212 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -683,41 +683,19 @@ static int sunxi_mmc_oclk_onoff(struct sunxi_mmc_host *host, u32 oclk_en)
 
 static int sunxi_mmc_calibrate(struct sunxi_mmc_host *host, int reg_off)
 {
-	u32 reg = readl(host->reg_base + reg_off);
-	u32 delay;
-	unsigned long timeout;
-
 	if (!host->cfg->can_calibrate)
 		return 0;
 
-	reg &= ~(SDXC_CAL_DL_MASK << SDXC_CAL_DL_SW_SHIFT);
-	reg &= ~SDXC_CAL_DL_SW_EN;
-
-	writel(reg | SDXC_CAL_START, host->reg_base + reg_off);
-
-	dev_dbg(mmc_dev(host->mmc), "calibration started\n");
-
-	timeout = jiffies + HZ * SDXC_CAL_TIMEOUT;
-
-	while (!((reg = readl(host->reg_base + reg_off)) & SDXC_CAL_DONE)) {
-		if (time_before(jiffies, timeout))
-			cpu_relax();
-		else {
-			reg &= ~SDXC_CAL_START;
-			writel(reg, host->reg_base + reg_off);
-
-			return -ETIMEDOUT;
-		}
-	}
-
-	delay = (reg >> SDXC_CAL_DL_SHIFT) & SDXC_CAL_DL_MASK;
-
-	reg &= ~SDXC_CAL_START;
-	reg |= (delay << SDXC_CAL_DL_SW_SHIFT) | SDXC_CAL_DL_SW_EN;
-
-	writel(reg, host->reg_base + reg_off);
-
-	dev_dbg(mmc_dev(host->mmc), "calibration ended, reg is 0x%x\n", reg);
+	/*
+	 * FIXME:
+	 * This is not clear how the calibration is supposed to work
+	 * yet. The best rate have been obtained by simply setting the
+	 * delay to 0, as Allwinner does in its BSP.
+	 *
+	 * The only mode that doesn't have such a delay is HS400, that
+	 * is in itself a TODO.
+	 */
+	writel(SDXC_CAL_DL_SW_EN, host->reg_base + reg_off);
 
 	return 0;
 }
@@ -809,7 +787,13 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
 	if (ret)
 		return ret;
 
-	/* TODO: enable calibrate on sdc2 SDXC_REG_DS_DL_REG of A64 */
+	/*
+	 * FIXME:
+	 *
+	 * In HS400 we'll also need to calibrate the data strobe
+	 * signal. This should only happen on the MMC2 controller (at
+	 * least on the A64).
+	 */
 
 	return sunxi_mmc_oclk_onoff(host, 1);
 }
-- 
git-series 0.8.11

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[PATCH v5 0/13] arm64: allwinner: a64: Enable MMC support Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-27 22:50 +0100
  [PATCH v5 11/13] arm64: allwinner: pine64: add MMC support Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-27 22:50 +0100
  [PATCH v5 2/13] mmc: sunxi: Gate the clock when rate is 0 Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-27 23:00 +0100
  [PATCH v5 3/13] mmc: sunxi: Always set signal delay to 0 for A64 Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-27 23:00 +0100
  [PATCH v5 4/13] mmc: sunxi: Enable the new timings for the A64 MMC controllers Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-27 23:00 +0100
  [PATCH v5 5/13] mmc: sunxi: Mask DATA0 when updating the clock Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-27 23:00 +0100
  [PATCH v5 7/13] mmc: sunxi: Add more debug informations Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-27 23:00 +0100
  [PATCH v5 8/13] arm64: allwinner: a64: Add MMC nodes Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-27 23:00 +0100
  [PATCH v5 6/13] mmc: sunxi: Add EMMC (MMC2) controller compatible Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-27 23:00 +0100
    Re: [PATCH v5 6/13] mmc: sunxi: Add EMMC (MMC2) controller compatible Ulf Hansson <ulf.hansson@linaro.org> - 2017-01-30 11:20 +0100
      Re: [PATCH v5 6/13] mmc: sunxi: Add EMMC (MMC2) controller compatible Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-30 12:10 +0100
  [PATCH v5 13/13] arm64: allwinner: add BananaPi-M64 support Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-27 23:00 +0100
  [PATCH v5 9/13] arm64: allwinner: a64: Add MMC pinctrl nodes Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-27 23:00 +0100
  Re: [PATCH v5 0/13] arm64: allwinner: a64: Enable MMC support Chen-Yu Tsai <wens@csie.org> - 2017-01-28 13:50 +0100
    Re: [PATCH v5 0/13] arm64: allwinner: a64: Enable MMC support Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-30 11:50 +0100
  Re: [PATCH v5 0/13] arm64: allwinner: a64: Enable MMC support Ulf Hansson <ulf.hansson@linaro.org> - 2017-01-30 11:20 +0100
  Re: [PATCH v5 0/13] arm64: allwinner: a64: Enable MMC support Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-01-30 12:20 +0100

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