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Re: [PATCH] drm/ttm: Make sure BOs being swapped out are cacheable

From Daniel Vetter <daniel@ffwll.ch>
Newsgroups linux.kernel
Subject Re: [PATCH] drm/ttm: Make sure BOs being swapped out are cacheable
Date 2017-01-27 08:40 +0100
Message-ID <t49ix-1gY-3@gated-at.bofh.it> (permalink)
References (1 earlier) <t44sx-6N1-5@gated-at.bofh.it> <t44sx-6N1-7@gated-at.bofh.it> <t44sx-6N1-9@gated-at.bofh.it> <t44sx-6N1-3@gated-at.bofh.it> <t49ix-1gY-5@gated-at.bofh.it>
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On Fri, Jan 27, 2017 at 07:23:58AM +0100, Thomas Hellstrom wrote:
> On 01/27/2017 03:29 AM, Michel Dänzer wrote:
> > On 26/01/17 09:46 AM, Sinclair Yeh wrote:
> >> On Wed, Jan 25, 2017 at 10:49:33AM +0100, Christian König wrote:
> >>> Am 25.01.2017 um 10:25 schrieb Thomas Hellstrom:
> >>>> On 01/25/2017 09:21 AM, Michel Dänzer wrote:
> >>>>> From: Michel Dänzer <michel.daenzer@amd.com>
> >>>>>
> >>>>> The current caching state may not be tt_cached, even though the
> >>>>> placement contains TTM_PL_FLAG_CACHED, because placement can contain
> >>>>> multiple caching flags. Trying to swap out such a BO would trip up the
> >>>>>
> >>>>> 	BUG_ON(ttm->caching_state != tt_cached);
> >>>>>
> >>>>> in ttm_tt_swapout.
> >>>>>
> >>>>> Cc: stable@vger.kernel.org
> >>>>> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
> >>>> Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
> >>> Reviewed-by: Christian König <christian.koenig@amd.com>.
> >> Reviewed-by: Sinclair Yeh <syeh@vmware.com>
> > Thanks for the reviews! Via which tree should we merge this?
> >
> >
> I don't maintain a TTM tree any longer. Let's check with Daniel if he
> can merge it through drm-misc.

I'm trying very hard not to get volunteered for ttm maintainer :-)
Nominally Alex&Christian have drm-misc commit rights, but they haven't
used them yet. But I think merging through drm-misc would make sense,
there's regular pull request trains for both -next and -fixes. Or merge
through the amd tree with Dave's ack, but I'd really like to get amd folks
into the drm-misc group ...
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

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Thread

[PATCH] drm/ttm: Make sure BOs being swapped out are cacheable Michel Dänzer <michel@daenzer.net> - 2017-01-25 09:30 +0100
  Re: [PATCH] drm/ttm: Make sure BOs being swapped out are cacheable Michel Dänzer <michel@daenzer.net> - 2017-01-27 03:30 +0100
    Re: [PATCH] drm/ttm: Make sure BOs being swapped out are cacheable Daniel Vetter <daniel@ffwll.ch> - 2017-01-27 08:40 +0100
      Re: [PATCH] drm/ttm: Make sure BOs being swapped out are cacheable Daniel Vetter <daniel@ffwll.ch> - 2017-01-27 15:20 +0100
        Re: [PATCH] drm/ttm: Make sure BOs being swapped out are cacheable Daniel Vetter <daniel@ffwll.ch> - 2017-01-27 16:00 +0100
      Re: [PATCH] drm/ttm: Make sure BOs being swapped out are cacheable Alex Deucher <alexdeucher@gmail.com> - 2017-01-27 16:20 +0100

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