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[PATCH 4.4 16/42] PCI: Enumerate switches below PCI-to-PCIe bridges

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4.4-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Bjorn Helgaas <bhelgaas@google.com>

commit 51ebfc92b72b4f7dac1ab45683bf56741e454b8c upstream.

A PCI-to-PCIe bridge (a "reverse bridge") has a PCI or PCI-X primary
interface and a PCI Express secondary interface.  The PCIe interface is a
Downstream Port that originates a Link.  See the "PCI Express to PCI/PCI-X
Bridge Specification", rev 1.0, sections 1.2 and A.6.

The bug report below involves a PCI-to-PCIe bridge and a PCIe switch below
the bridge:

  00:1e.0 Intel 82801 PCI Bridge to [bus 01-0a]
  01:00.0 Pericom PI7C9X111SL PCIe-to-PCI Reversible Bridge to [bus 02-0a]
  02:00.0 Pericom Device 8608 [PCIe Upstream Port] to [bus 03-0a]
  03:01.0 Pericom Device 8608 [PCIe Downstream Port] to [bus 0a]

01:00.0 is configured as a PCI-to-PCIe bridge (despite the name printed by
lspci).  As we traverse a PCIe hierarchy, device connections alternate
between PCIe Links and internal Switch logic.  Previously we did not
recognize that 01:00.0 had a secondary link, so we thought the 02:00.0
Upstream Port *did* have a secondary link.  In fact, it's the other way
around: 01:00.0 has a secondary link, and 02:00.0 has internal Switch logic
on its secondary side.

When we thought 02:00.0 had a secondary link, the pci_scan_slot() ->
only_one_child() path assumed 02:00.0 could have only one child, so 03:00.0
was the only possible downstream device.  But 03:00.0 doesn't exist, so we
didn't look for any other devices on bus 03.

Booting with "pci=pcie_scan_all" is a workaround, but we don't want users
to have to do that.

Recognize that PCI-to-PCIe bridges originate links on their secondary
interfaces.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=189361
Fixes: d0751b98dfa3 ("PCI: Add dev->has_secondary_link to track downstream PCIe links")
Tested-by: Blake Moore <blake.moore@men.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 drivers/pci/probe.c |   12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1019,6 +1019,7 @@ void set_pcie_port_type(struct pci_dev *
 	pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
 	if (!pos)
 		return;
+
 	pdev->pcie_cap = pos;
 	pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
 	pdev->pcie_flags_reg = reg16;
@@ -1026,13 +1027,14 @@ void set_pcie_port_type(struct pci_dev *
 	pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
 
 	/*
-	 * A Root Port is always the upstream end of a Link.  No PCIe
-	 * component has two Links.  Two Links are connected by a Switch
-	 * that has a Port on each Link and internal logic to connect the
-	 * two Ports.
+	 * A Root Port or a PCI-to-PCIe bridge is always the upstream end
+	 * of a Link.  No PCIe component has two Links.  Two Links are
+	 * connected by a Switch that has a Port on each Link and internal
+	 * logic to connect the two Ports.
 	 */
 	type = pci_pcie_type(pdev);
-	if (type == PCI_EXP_TYPE_ROOT_PORT)
+	if (type == PCI_EXP_TYPE_ROOT_PORT ||
+	    type == PCI_EXP_TYPE_PCIE_BRIDGE)
 		pdev->has_secondary_link = 1;
 	else if (type == PCI_EXP_TYPE_UPSTREAM ||
 		 type == PCI_EXP_TYPE_DOWNSTREAM) {

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[PATCH 4.4 00/42] 4.4.45-stable review Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 02/42] IB/mlx5: Wait for all async command completions to complete Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 29/42] ARM: dts: da850-evm: fix read access to SPI flash Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 05/42] IB/mlx4: Fix port query for 56Gb Ethernet links Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 09/42] ARM: dts: imx31: fix clock control module interrupts description Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 37/42] ARM: 8613/1: Fix the uaccess crash on PB11MPCore Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 32/42] arm64/ptrace: Preserve previous registers for short regset write - 3 Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 35/42] ARM: dts: imx6qdl-nitrogen6_max: fix sgtl5000 pinctrl init Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 14/42] svcrpc: dont leak contexts on PROC_DESTROY Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 24/42] ubifs: Fix journal replay wrt. xattr nodes Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 03/42] IB/mlx4: Set traffic class in AH Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 42/42] arm64: avoid returning from bad_mode Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 39/42] [media] ite-cir: initialize use_demodulator before using it Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 28/42] ceph: fix bad endianness handling in parse_reply_info_extra Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 31/42] arm64/ptrace: Preserve previous registers for short regset write - 2 Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 34/42] arm64/ptrace: Reject attempts to set incomplete hardware breakpoint fields Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:40 +0100
  [PATCH 4.4 16/42] PCI: Enumerate switches below PCI-to-PCIe bridges Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2017-01-24 09:50 +0100
  Re: [PATCH 4.4 00/42] 4.4.45-stable review Shuah Khan <shuah.kh@samsung.com> - 2017-01-24 19:30 +0100
  Re: [PATCH 4.4 00/42] 4.4.45-stable review Guenter Roeck <linux@roeck-us.net> - 2017-01-24 20:10 +0100

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