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Groups > linux.kernel > #1511309
| From | Moritz Fischer <moritz.fischer@ettus.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v2 5/5] fpga manager: cyclone-ps-spi: make delay variable |
| Date | 2016-10-28 19:50 +0200 |
| Message-ID | <sxjrY-2VC-39@gated-at.bofh.it> (permalink) |
| References | <sxiFz-2q3-9@gated-at.bofh.it> <sxiFB-2q3-59@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Hi Joshua,
looks good to me; however, I think since you're adding initial support,
I'd squash this together with [3/5].
On Fri, Oct 28, 2016 at 09:56:42AM -0700, Joshua Clayton wrote:
> The status pin may not show ready in the time described in the
> Altetera manual. check the value several times before giving up
s/Altetera/Altera
> For the hardware I am working on, the status pin takes 250 us,
> 5 times as long as described by Altera.
>
> Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
> ---
> drivers/fpga/cyclone-ps-spi.c | 13 ++++++++-----
> 1 file changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/fpga/cyclone-ps-spi.c b/drivers/fpga/cyclone-ps-spi.c
> index 4b70d5c..c368223 100644
> --- a/drivers/fpga/cyclone-ps-spi.c
> +++ b/drivers/fpga/cyclone-ps-spi.c
> @@ -20,6 +20,7 @@
>
> #define FPGA_RESET_TIME 50 /* time in usecs to trigger FPGA config */
> -#define FPGA_MIN_DELAY 250 /* min usecs to wait for config status */
> +#define FPGA_MIN_DELAY 50 /* min usecs to wait for config status */
> +#define FPGA_MAX_DELAY 1000 /* max usecs to wait for config status */
>
> struct cyclonespi_conf {
> struct gpio_desc *config;
> @@ -42,6 +43,7 @@ static int cyclonespi_write_init(struct fpga_manager *mgr, u32 flags,
> const char *buf, size_t count)
> {
> struct cyclonespi_conf *conf = (struct cyclonespi_conf *)mgr->priv;
> + int i;
>
> if (flags & FPGA_MGR_PARTIAL_RECONFIG) {
> dev_err(&mgr->dev, "Partial reconfiguration not supported.\n");
> @@ -56,13 +58,14 @@ static int cyclonespi_write_init(struct fpga_manager *mgr, u32 flags,
> }
>
> gpiod_set_value(conf->config, 1);
> - usleep_range(FPGA_MIN_DELAY, FPGA_MIN_DELAY + 20);
> - if (gpiod_get_value(conf->status) == 0) {
> - dev_err(&mgr->dev, "Status pin not ready.\n");
> - return -EIO;
> + for (i = 0; i < (FPGA_MAX_DELAY / FPGA_MIN_DELAY); i++) {
> + usleep_range(FPGA_MIN_DELAY, FPGA_MIN_DELAY + 20);
> + if (gpiod_get_value(conf->status))
> + return 0;
> }
>
> - return 0;
> + dev_err(&mgr->dev, "Status pin not ready.\n");
> + return -EIO;
> }
>
> static void rev_buf(void *buf, size_t len)
> --
> 2.7.4
>
Cheers,
Moritz
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[PATCH v2 0/4] Altera Cyclone Passive Serial SPI FPGA Manager Joshua Clayton <stillcompiling@gmail.com> - 2016-10-28 19:00 +0200
[PATCH v2 2/5] doc: dt: add cyclone-spi binding document Joshua Clayton <stillcompiling@gmail.com> - 2016-10-28 19:00 +0200
Re: [PATCH v2 2/5] doc: dt: add cyclone-spi binding document Rob Herring <robh@kernel.org> - 2016-10-31 07:20 +0100
[PATCH v2 5/5] fpga manager: cyclone-ps-spi: make delay variable Joshua Clayton <stillcompiling@gmail.com> - 2016-10-28 19:00 +0200
Re: [PATCH v2 5/5] fpga manager: cyclone-ps-spi: make delay variable Moritz Fischer <moritz.fischer@ettus.com> - 2016-10-28 19:50 +0200
Re: [PATCH v2 5/5] fpga manager: cyclone-ps-spi: make delay variable Joshua Clayton <stillcompiling@gmail.com> - 2016-10-28 21:50 +0200
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