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Re: [PATCH v5 00/18] Intel Cache Allocation Technology

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On Sat, 22 Oct 2016, Fenghua Yu wrote:
> This version should cover all comments from Thomas.

Emphasis on should :)

But this series is a major step forward and I decided to merge the first
lot:
 
> 0001-Documentation-ABI-Add-a-document-entry-for-cache-id.patch
> 0002-cacheinfo-Introduce-cache-id.patch
> 0003-x86-intel_cacheinfo-Enable-cache-id-in-x86.patch
> 0004-x86-intel_rdt-Feature-discovery.patch

> 0006-x86-intel_rdt-Add-CONFIG-Makefile-and-basic-initiali.patch
> 0007-x86-intel_rdt-Add-Haswell-feature-discovery.patch
> 0008-x86-intel_rdt-Pick-up-L3-L2-RDT-parameters-from-CPUID.patch
> 0009-x86-cqm-Move-PQR_ASSOC-management-code-into-generic-.patch

I fixed up #0004 (including Borislavs comments) and polished some of the
changelogs a bit.

This reduces the size of the series and prevents that these parts get
[un]intentionally fat fingered once again.

I intentionally left out the documentation patch as that one needs to be
updated when you address the max closid issues.

Please work against tip x86/cache from now on.

The remaining issues are not that big, so I think we are really close.

Thanks

       tglx

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[PATCH v5 00/18] Intel Cache Allocation Technology "Fenghua Yu" <fenghua.yu@intel.com> - 2016-10-22 15:30 +0200
  [PATCH v5 11/18] x86/intel_rdt: Add basic resctrl filesystem support "Fenghua Yu" <fenghua.yu@intel.com> - 2016-10-22 15:30 +0200
    Re: [PATCH v5 11/18] x86/intel_rdt: Add basic resctrl filesystem  support Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 17:10 +0200
  [PATCH v5 09/18] x86/cqm: Move PQR_ASSOC management code into generic code used by both CQM and CAT "Fenghua Yu" <fenghua.yu@intel.com> - 2016-10-22 15:30 +0200
    [tip:x86/cache] x86/cqm: Share PQR_ASSOC related data between CQM  and CAT tip-bot for Fenghua Yu <tipbot@zytor.com> - 2016-10-26 23:40 +0200
  [PATCH v5 07/18] x86/intel_rdt: Add Haswell feature discovery "Fenghua Yu" <fenghua.yu@intel.com> - 2016-10-22 15:30 +0200
    [tip:x86/cache] x86/intel_rdt: Add Haswell feature discovery tip-bot for Fenghua Yu <tipbot@zytor.com> - 2016-10-26 23:30 +0200
  [PATCH v5 10/18] x86/intel_rdt: Build structures for each resource based on cache topology "Fenghua Yu" <fenghua.yu@intel.com> - 2016-10-22 15:30 +0200
    Re: [PATCH v5 10/18] x86/intel_rdt: Build structures for each resource  based on cache topology Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 15:10 +0200
      Re: [PATCH v5 10/18] x86/intel_rdt: Build structures for each  resource based on cache topology "Luck, Tony" <tony.luck@intel.com> - 2016-10-26 18:10 +0200
        Re: [PATCH v5 10/18] x86/intel_rdt: Build structures for each resource  based on cache topology Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 19:40 +0200
      Re: [PATCH v5 10/18] x86/intel_rdt: Build structures for each  resource based on cache topology Fenghua Yu <fenghua.yu@intel.com> - 2016-10-26 23:20 +0200
        Re: [PATCH v5 10/18] x86/intel_rdt: Build structures for each resource  based on cache topology Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 23:30 +0200
  [PATCH v5 13/18] x86/intel_rdt: Add mkdir to resctrl file system "Fenghua Yu" <fenghua.yu@intel.com> - 2016-10-22 15:30 +0200
    Re: [PATCH v5 13/18] x86/intel_rdt: Add mkdir to resctrl file  system Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 17:10 +0200
      Re: [PATCH v5 13/18] x86/intel_rdt: Add mkdir to resctrl file system Fenghua Yu <fenghua.yu@intel.com> - 2016-10-28 20:00 +0200
        Re: [PATCH v5 13/18] x86/intel_rdt: Add mkdir to resctrl file  system Thomas Gleixner <tglx@linutronix.de> - 2016-10-28 20:50 +0200
  [PATCH v5 18/18] MAINTAINERS: Add maintainer for Intel RDT resource allocation "Fenghua Yu" <fenghua.yu@intel.com> - 2016-10-22 15:30 +0200
  [PATCH v5 17/18] x86/intel_rdt: Add scheduler hook "Fenghua Yu" <fenghua.yu@intel.com> - 2016-10-22 15:30 +0200
  [PATCH v5 04/18] x86/intel_rdt: Feature discovery "Fenghua Yu" <fenghua.yu@intel.com> - 2016-10-22 15:30 +0200
    Re: [PATCH v5 04/18] x86/intel_rdt: Feature discovery Borislav Petkov <bp@suse.de> - 2016-10-26 16:20 +0200
      Re: [PATCH v5 04/18] x86/intel_rdt: Feature discovery Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 16:40 +0200
    [tip:x86/cache] x86/cpufeature: Add RDT CPUID feature bits tip-bot for Fenghua Yu <tipbot@zytor.com> - 2016-10-26 23:30 +0200
  [PATCH v5 02/18] cacheinfo: Introduce cache id "Fenghua Yu" <fenghua.yu@intel.com> - 2016-10-22 15:30 +0200
    [tip:x86/cache] cacheinfo: Introduce cache id tip-bot for Fenghua Yu <tipbot@zytor.com> - 2016-10-26 23:30 +0200
  [PATCH v5 06/18] x86/intel_rdt: Add CONFIG, Makefile, and basic initialization "Fenghua Yu" <fenghua.yu@intel.com> - 2016-10-22 15:30 +0200
    Re: [PATCH v5 06/18] x86/intel_rdt: Add CONFIG, Makefile, and basic  initialization Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 22:50 +0200
    [tip:x86/cache] x86/intel_rdt: Add CONFIG, Makefile, and basic  initialization tip-bot for Fenghua Yu <tipbot@zytor.com> - 2016-10-26 23:30 +0200
  Re: [PATCH v5 00/18] Intel Cache Allocation Technology Thomas Gleixner <tglx@linutronix.de> - 2016-10-26 23:50 +0200
    Re: [PATCH v5 00/18] Intel Cache Allocation Technology Fenghua Yu <fenghua.yu@intel.com> - 2016-10-27 00:00 +0200

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