Re: [PATCH v3 0/5] Cavium ThunderX uncore PMU support

From	Peter Zijlstra <peterz@infradead.org>
Newsgroups	linux.kernel
Subject	Re: [PATCH v3 0/5] Cavium ThunderX uncore PMU support
Date	2016-10-20 13:40 +0200
Message-ID	<sujRv-6UT-1@gated-at.bofh.it> (permalink)
References	<suhZn-5G9-3@gated-at.bofh.it> <suiVs-6l9-17@gated-at.bofh.it> <sujRv-6UT-3@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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On Thu, Oct 20, 2016 at 01:23:51PM +0200, Jan Glauber wrote:
> On Thu, Oct 20, 2016 at 12:37:07PM +0200, Peter Zijlstra wrote:
> > On Thu, Oct 20, 2016 at 11:30:36AM +0200, Jan Glauber wrote:
> > > Note:
> > > I'm using perf_sw_context in difference to perf_invalid_context
> > > (see WARN_ON in perf_pmu_register). Reason is that with perf_invalid_context
> > > add() is never called and the counter results are shown as "unsupported" by
> > > perf. With perf_sw_context everything works as expected.
> > 
> > What?! All the uncore PMUs use perf_invalid_context. What doesn't work
> > for you?
> 
> OK, so using perf_invalid_context and "-a" seems to work.
> 
> But I must say that I hate that from a user perspective. The user needs to know about
> the type of PMU behind the event and then provide "-a" or get a "<not supported"
> as counter value?

This really boils down to the fact that users really had better know
what they're on about.

There's only so much you can let clueless people do.

The fact is, they already _manually_ select your (uncore) PMU, so they
had then better also know what its limitations are.

Thread

[PATCH v3 0/5] Cavium ThunderX uncore PMU support Jan Glauber <jglauber@cavium.com> - 2016-10-20 11:40 +0200
  [PATCH v3 4/5] arm64: perf: Cavium ThunderX LMC uncore support Jan Glauber <jglauber@cavium.com> - 2016-10-20 11:40 +0200
  [PATCH v3 3/5] arm64: perf: Cavium ThunderX L2C CBC uncore support Jan Glauber <jglauber@cavium.com> - 2016-10-20 11:40 +0200
  [PATCH v3 5/5] arm64: perf: Cavium ThunderX OCX TLK uncore support Jan Glauber <jglauber@cavium.com> - 2016-10-20 11:40 +0200
  [PATCH v3 2/5] arm64: perf: Cavium ThunderX L2C TAD uncore support Jan Glauber <jglauber@cavium.com> - 2016-10-20 11:40 +0200
  Re: [PATCH v3 0/5] Cavium ThunderX uncore PMU support Peter Zijlstra <peterz@infradead.org> - 2016-10-20 12:40 +0200
    Re: [PATCH v3 0/5] Cavium ThunderX uncore PMU support Mark Rutland <mark.rutland@arm.com> - 2016-10-20 12:50 +0200
      Re: [PATCH v3 0/5] Cavium ThunderX uncore PMU support Peter Zijlstra <peterz@infradead.org> - 2016-10-20 13:00 +0200
        Re: [PATCH v3 0/5] Cavium ThunderX uncore PMU support Mark Rutland <mark.rutland@arm.com> - 2016-10-20 13:10 +0200
    Re: [PATCH v3 0/5] Cavium ThunderX uncore PMU support Peter Zijlstra <peterz@infradead.org> - 2016-10-20 13:40 +0200
  Re: [PATCH v3 0/5] Cavium ThunderX uncore PMU support Mark Rutland <mark.rutland@arm.com> - 2016-10-20 12:50 +0200

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