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Re: [PATCH V3 04/10] arm64: exception: handle Synchronous External Abort

From Punit Agrawal <punit.agrawal@arm.com>
Newsgroups linux.kernel
Subject Re: [PATCH V3 04/10] arm64: exception: handle Synchronous External Abort
Date 2016-10-12 19:50 +0200
Message-ID <srvPb-7zM-5@gated-at.bofh.it> (permalink)
References <spL21-6h3-1@gated-at.bofh.it> <spL22-6h3-23@gated-at.bofh.it>
Organization linux.* mail to news gateway

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Hi Tyler,

A couple of hopefully not bike shedding comments below.

Tyler Baicar <tbaicar@codeaurora.org> writes:

> SEA exceptions are often caused by an uncorrected hardware
> error, and are handled when data abort and instruction abort
> exception classes have specific values for their Fault Status
> Code.
> When SEA occurs, before killing the process, go through
> the handlers registered in the notification list.
> Update fault_info[] with specific SEA faults so that the
> new SEA handler is used.
>
> Signed-off-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
> Signed-off-by: Tyler Baicar <tbaicar@codeaurora.org>
> Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
> ---
>  arch/arm64/include/asm/system_misc.h | 13 ++++++++
>  arch/arm64/mm/fault.c                | 58 +++++++++++++++++++++++++++++-------
>  2 files changed, 61 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm64/include/asm/system_misc.h b/arch/arm64/include/asm/system_misc.h
> index 57f110b..90daf4a 100644
> --- a/arch/arm64/include/asm/system_misc.h
> +++ b/arch/arm64/include/asm/system_misc.h
> @@ -64,4 +64,17 @@ extern void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
>  
>  #endif	/* __ASSEMBLY__ */
>  
> +/*
> + * The functions below are used to register and unregister callbacks
> + * that are to be invoked when a Synchronous External Abort (SEA)
> + * occurs. An SEA is raised by certain fault status codes that have
> + * either data or instruction abort as the exception class, and
> + * callbacks may be registered to parse or handle such hardware errors.
> + *
> + * Registered callbacks are run in an interrupt/atomic context. They
> + * are not allowed to block or sleep.
> + */
> +int sea_register_handler_chain(struct notifier_block *nb);
> +void sea_unregister_handler_chain(struct notifier_block *nb);
> +
>  #endif	/* __ASM_SYSTEM_MISC_H */
> diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
> index 05d2bd7..81cb7ad 100644
> --- a/arch/arm64/mm/fault.c
> +++ b/arch/arm64/mm/fault.c
> @@ -39,6 +39,22 @@
>  #include <asm/pgtable.h>
>  #include <asm/tlbflush.h>
>  
> +/*
> + * GHES SEA handler code may register a notifier call here to
> + * handle HW error record passed from platform.
> + */
> +static ATOMIC_NOTIFIER_HEAD(sea_handler_chain);
> +
> +int sea_register_handler_chain(struct notifier_block *nb)
> +{
> +	return atomic_notifier_chain_register(&sea_handler_chain, nb);
> +}
> +
> +void sea_unregister_handler_chain(struct notifier_block *nb)
> +{
> +	atomic_notifier_chain_unregister(&sea_handler_chain, nb);
> +}
> +

What do you think of naming the above functions as
[un]register_synchonous_ext_abort_notifier?

For an API, I find "sea" doesn't quite convey the message.

One more comment below.

>  static const char *fault_name(unsigned int esr);
>  
>  #ifdef CONFIG_KPROBES
> @@ -480,6 +496,28 @@ static int do_bad(unsigned long addr, unsigned int esr, struct pt_regs *regs)
>  	return 1;
>  }
>  
> +/*
> + * This abort handler deals with Synchronous External Abort.
> + * It calls notifiers, and then returns "fault".
> + */
> +static int do_sea(unsigned long addr, unsigned int esr, struct pt_regs *regs)
> +{
> +	struct siginfo info;
> +
> +	atomic_notifier_call_chain(&sea_handler_chain, 0, NULL);
> +
> +	pr_err("Synchronous External Abort: %s (0x%08x) at 0x%016lx\n",
> +		 fault_name(esr), esr, addr);
> +
> +	info.si_signo = SIGBUS;
> +	info.si_errno = 0;
> +	info.si_code  = 0;
> +	info.si_addr  = (void __user *)addr;
> +	arm64_notify_die("", regs, &info, esr);
> +
> +	return 0;
> +}
> +
>  static const struct fault_info {
>  	int	(*fn)(unsigned long addr, unsigned int esr, struct pt_regs *regs);
>  	int	sig;
> @@ -502,22 +540,22 @@ static const struct fault_info {
>  	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 1 permission fault"	},
>  	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 2 permission fault"	},
>  	{ do_page_fault,	SIGSEGV, SEGV_ACCERR,	"level 3 permission fault"	},
> -	{ do_bad,		SIGBUS,  0,		"synchronous external abort"	},
> +	{ do_sea,		SIGBUS,  0,		"synchronous external abort"	},
>  	{ do_bad,		SIGBUS,  0,		"unknown 17"			},
>  	{ do_bad,		SIGBUS,  0,		"unknown 18"			},
>  	{ do_bad,		SIGBUS,  0,		"unknown 19"			},
> -	{ do_bad,		SIGBUS,  0,		"synchronous abort (translation table walk)" },
> -	{ do_bad,		SIGBUS,  0,		"synchronous abort (translation table walk)" },
> -	{ do_bad,		SIGBUS,  0,		"synchronous abort (translation table walk)" },
> -	{ do_bad,		SIGBUS,  0,		"synchronous abort (translation table walk)" },
> -	{ do_bad,		SIGBUS,  0,		"synchronous parity error"	},
> +	{ do_sea,		SIGBUS,  0,		"level 0 SEA (trans tbl walk)"	},
> +	{ do_sea,		SIGBUS,  0,		"level 1 SEA (trans tbl walk)"	},
> +	{ do_sea,		SIGBUS,  0,		"level 2 SEA (trans tbl walk)"	},
> +	{ do_sea,		SIGBUS,  0,		"level 3 SEA (trans tbl walk)"	},
                                                                 ^^^
The comment about naming applies here as well.

Thanks,
Punit

[...]

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Thread

[PATCH V3 00/10] Add UEFI 2.6 and ACPI 6.1 updates for RAS on ARM64 Tyler Baicar <tbaicar@codeaurora.org> - 2016-10-07 23:40 +0200
  [PATCH V3 07/10] efi: print unrecognized CPER section Tyler Baicar <tbaicar@codeaurora.org> - 2016-10-07 23:40 +0200
  [PATCH V3 08/10] ras: acpi / apei: generate trace event for unrecognized CPER section Tyler Baicar <tbaicar@codeaurora.org> - 2016-10-07 23:40 +0200
    Re: [PATCH V3 08/10] ras: acpi / apei: generate trace event for unrecognized CPER section Punit Agrawal <punit.agrawal@arm.com> - 2016-10-13 13:00 +0200
      Re: [PATCH V3 08/10] ras: acpi / apei: generate trace event for  unrecognized CPER section "Baicar, Tyler" <tbaicar@codeaurora.org> - 2016-10-13 22:20 +0200
  [PATCH V3 10/10] arm64: KVM: add guest SEA support Tyler Baicar <tbaicar@codeaurora.org> - 2016-10-07 23:40 +0200
    Re: [PATCH V3 10/10] arm64: KVM: add guest SEA support Punit Agrawal <punit.agrawal@arm.com> - 2016-10-13 15:20 +0200
      Re: [PATCH V3 10/10] arm64: KVM: add guest SEA support "Baicar, Tyler" <tbaicar@codeaurora.org> - 2016-10-13 22:20 +0200
        Re: [PATCH V3 10/10] arm64: KVM: add guest SEA support Punit Agrawal <punit.agrawal@arm.com> - 2016-10-14 11:50 +0200
          Re: [PATCH V3 10/10] arm64: KVM: add guest SEA support "Baicar, Tyler" <tbaicar@codeaurora.org> - 2016-10-15 00:00 +0200
  [PATCH V3 03/10] efi: parse ARMv8 processor error Tyler Baicar <tbaicar@codeaurora.org> - 2016-10-07 23:40 +0200
  [PATCH V3 01/10] acpi: apei: read ack upon ghes record consumption Tyler Baicar <tbaicar@codeaurora.org> - 2016-10-07 23:40 +0200
    Re: [PATCH V3 01/10] acpi: apei: read ack upon ghes record consumption Punit Agrawal <punit.agrawal@arm.com> - 2016-10-12 20:20 +0200
      Re: [PATCH V3 01/10] acpi: apei: read ack upon ghes record  consumption "Baicar, Tyler" <tbaicar@codeaurora.org> - 2016-10-13 16:00 +0200
  [PATCH V3 05/10] acpi: apei: handle SEA notification type for ARMv8 Tyler Baicar <tbaicar@codeaurora.org> - 2016-10-07 23:40 +0200
    Re: [PATCH V3 05/10] acpi: apei: handle SEA notification type for ARMv8 Punit Agrawal <punit.agrawal@arm.com> - 2016-10-12 20:10 +0200
      Re: [PATCH V3 05/10] acpi: apei: handle SEA notification type for  ARMv8 "Baicar, Tyler" <tbaicar@codeaurora.org> - 2016-10-13 16:10 +0200
        Re: [PATCH V3 05/10] acpi: apei: handle SEA notification type for ARMv8 Punit Agrawal <punit.agrawal@arm.com> - 2016-10-14 11:50 +0200
    Re: [PATCH V3 05/10] acpi: apei: handle SEA notification type for  ARMv8 Hanjun Guo <hanjun.guo@linaro.org> - 2016-10-18 14:50 +0200
      Re: [PATCH V3 05/10] acpi: apei: handle SEA notification type for  ARMv8 "Abdulhamid, Harb" <harba@codeaurora.org> - 2016-10-19 19:00 +0200
        Re: [PATCH V3 05/10] acpi: apei: handle SEA notification type for  ARMv8 Hanjun Guo <guohanjun@huawei.com> - 2016-10-23 11:20 +0200
    Re: [PATCH V3 05/10] acpi: apei: handle SEA notification type for  ARMv8 Hanjun Guo <hanjun.guo@linaro.org> - 2016-10-18 15:10 +0200
      Re: [PATCH V3 05/10] acpi: apei: handle SEA notification type for  ARMv8 "Abdulhamid, Harb" <harba@codeaurora.org> - 2016-10-19 19:20 +0200
  [PATCH V3 04/10] arm64: exception: handle Synchronous External Abort Tyler Baicar <tbaicar@codeaurora.org> - 2016-10-07 23:40 +0200
    Re: [PATCH V3 04/10] arm64: exception: handle Synchronous External Abort Punit Agrawal <punit.agrawal@arm.com> - 2016-10-12 19:50 +0200
      Re: [PATCH V3 04/10] arm64: exception: handle Synchronous External  Abort "Baicar, Tyler" <tbaicar@codeaurora.org> - 2016-10-13 16:00 +0200
  [PATCH V3 09/10] trace, ras: add ARM processor error trace event Tyler Baicar <tbaicar@codeaurora.org> - 2016-10-07 23:40 +0200
    Re: [PATCH V3 09/10] trace, ras: add ARM processor error trace  event Steven Rostedt <rostedt@goodmis.org> - 2016-10-07 23:50 +0200
      Re: [PATCH V3 09/10] trace, ras: add ARM processor error trace event "Baicar, Tyler" <tbaicar@codeaurora.org> - 2016-10-12 23:30 +0200
  [PATCH V3 02/10] ras: acpi/apei: cper: generic error data entry v3 per ACPI 6.1 Tyler Baicar <tbaicar@codeaurora.org> - 2016-10-07 23:40 +0200
    Re: [PATCH V3 02/10] ras: acpi/apei: cper: generic error data entry  v3 per ACPI 6.1 Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-10-11 19:40 +0200
      Re: [PATCH V3 02/10] ras: acpi/apei: cper: generic error data entry  v3 per ACPI 6.1 "Baicar, Tyler" <tbaicar@codeaurora.org> - 2016-10-13 00:30 +0200
        Re: [PATCH V3 02/10] ras: acpi/apei: cper: generic error data entry  v3 per ACPI 6.1 Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-10-13 11:00 +0200
          Re: [PATCH V3 02/10] ras: acpi/apei: cper: generic error data entry  v3 per ACPI 6.1 "Baicar, Tyler" <tbaicar@codeaurora.org> - 2016-10-13 21:50 +0200
            Re: [PATCH V3 02/10] ras: acpi/apei: cper: generic error data entry  v3 per ACPI 6.1 Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-10-14 18:30 +0200
              Re: [PATCH V3 02/10] ras: acpi/apei: cper: generic error data entry  v3 per ACPI 6.1 Mark Rutland <mark.rutland@arm.com> - 2016-10-14 18:50 +0200
    Re: [PATCH V3 02/10] ras: acpi/apei: cper: generic error data entry  v3 per ACPI 6.1 Russell King - ARM Linux <linux@armlinux.org.uk> - 2016-10-11 21:10 +0200
      Re: [PATCH V3 02/10] ras: acpi/apei: cper: generic error data entry  v3 per ACPI 6.1 "Baicar, Tyler" <tbaicar@codeaurora.org> - 2016-10-13 00:20 +0200
  [PATCH V3 06/10] acpi: apei: panic OS with fatal error status block Tyler Baicar <tbaicar@codeaurora.org> - 2016-10-07 23:40 +0200
    Re: [PATCH V3 06/10] acpi: apei: panic OS with fatal error status  block Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2016-10-13 15:10 +0200
      Re: [PATCH V3 06/10] acpi: apei: panic OS with fatal error status  block "Baicar, Tyler" <tbaicar@codeaurora.org> - 2016-10-14 01:50 +0200

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