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Groups > linux.kernel > #1500313
| From | Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v3 0/4] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing |
| Date | 2016-10-13 16:50 +0200 |
| Message-ID | <srP1v-4Cs-5@gated-at.bofh.it> (permalink) |
| Organization | linux.* mail to news gateway |
These patches enable Intel Xeon Phi x200 feature to use MONITOR/MWAIT instruction in ring 3 (userspace) Patches set MSR 0x140 for all logical CPUs. Then expose it as CPU feature and introduces elf HWCAP capability for x86. Reference (the solution is temporary MSR definition will be in next SDM document): https://software.intel.com/en-us/blogs/2016/10/06/intel-xeon-phi-product-family-x200-knl-user-mode-ring-3-monitor-and-mwait v2: Check MSR before wrmsrl Shortened names Used Word 3 for feature init_scattered_cpuid_features() Fixed commit messages v3: Included Daves and Thomas comments Grzegorz Andrejczuk (4): Add R3MWAIT register and bit to msr-info.h Add enabling of the R3 MWAIT during boot for KNL Add hwcap2 for x86 Add R3MWAIT to CPU features arch/x86/include/asm/cpufeatures.h | 2 ++ arch/x86/include/asm/elf.h | 9 +++++++++ arch/x86/include/asm/msr-index.h | 5 +++++ arch/x86/include/uapi/asm/hwcap.h | 7 +++++++ arch/x86/kernel/cpu/common.c | 6 ++++++ arch/x86/kernel/cpu/intel.c | 33 +++++++++++++++++++++++++++++++++ 6 files changed, 62 insertions(+) create mode 100644 arch/x86/include/uapi/asm/hwcap.h -- 2.5.1
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[PATCH v3 0/4] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing Grzegorz Andrejczuk <grzegorz.andrejczuk@intel.com> - 2016-10-13 16:50 +0200
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