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Re: [PATCH v3 05/18] Documentation, x86: Documentation for Intel resource allocation user interface

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On Sat, Oct 08, 2016 at 01:33:06PM -0700, Fenghua Yu wrote:
> On Sat, Oct 08, 2016 at 12:12:07PM -0500, Nilay Vaish wrote:
> > On 7 October 2016 at 21:45, Fenghua Yu <fenghua.yu@intel.com> wrote:
> > > From: Fenghua Yu <fenghua.yu@intel.com>
> > >
> > > +L3 details (code and data prioritization disabled)
> > > +--------------------------------------------------
> > > +With CDP disabled the L3 schemata format is:
> > > +
> > > +       L3:<cache_id0>=<cbm>;<cache_id1>=<cbm>;...
> > > +
> > > +L3 details (CDP enabled via mount option to resctrl)
> > > +----------------------------------------------------
> > > +When CDP is enabled, you need to specify separate cache bit masks for
> > > +code and data access. The generic format is:
> > > +
> > > +       L3:<cache_id0>=<d_cbm>,<i_cbm>;<cache_id1>=<d_cbm>,<i_cbm>;...
> > 
> > Can we drop L3 here and instead say:
> > L<level>:<cache_id0>=<d_cbm>,<i_cbm>;<cache_id1>=<d_cbm>,<i_cbm>;...
> > 
> > and similarly for without CDP as well.
> 
> L3 and L2 are similar but different. L2 doesn't have CDP feature. It would
> be better to talk them separately here.
> 

Perhaps we should document the general form, and then show examples
for L3 (and later L2 and other resources as they are added). Note
in particular that other resources are not cache-like ... so the
pattern you see between L3 and L2 is short lived. Future resources
that can be controlled are not caches.

General form of a resource line is:

{resource type}:[{resource instanceM}={resource value};]*N

where "M" iterates over all online instances of this resource,
and "N" is the total number. [and the ";" is a separator, not a terminator,
but I'm not sure how to write that].

For the "L3" resource there are two formats for the value.
With CDP enabled:
	{d-cache bit mask},{i-cache bit mask}
with CDP disabled:
	{cache bit mask}

"L2" resource doesn't support CDP, so the only format is {cache bit mask}


The next resource coming will have values that are simple ranges {0 .. max}

-Tony

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[PATCH v3 05/18] Documentation, x86: Documentation for Intel resource allocation user interface "Fenghua Yu" <fenghua.yu@intel.com> - 2016-10-08 01:50 +0200
  Re: [PATCH v3 05/18] Documentation, x86: Documentation for Intel  resource allocation user interface Nilay Vaish <nilayvaish@gmail.com> - 2016-10-08 19:20 +0200
    Re: [PATCH v3 05/18] Documentation, x86: Documentation for Intel  resource allocation user interface Fenghua Yu <fenghua.yu@intel.com> - 2016-10-08 19:40 +0200
      Re: [PATCH v3 05/18] Documentation, x86: Documentation for Intel  resource allocation user interface "Luck, Tony" <tony.luck@intel.com> - 2016-10-10 19:30 +0200
        Re: [PATCH v3 05/18] Documentation, x86: Documentation for Intel  resource allocation user interface Nilay Vaish <nilayvaish@gmail.com> - 2016-10-11 19:10 +0200
          Re: [PATCH v3 05/18] Documentation, x86: Documentation for Intel  resource allocation user interface "Luck, Tony" <tony.luck@intel.com> - 2016-10-11 20:10 +0200

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