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Groups > linux.kernel > #1496654
| From | John Garry <john.garry@huawei.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06 |
| Date | 2016-10-06 15:40 +0200 |
| Message-ID | <sph3Y-GK-9@gated-at.bofh.it> (permalink) |
| References | (2 earlier) <shjPk-27U-17@gated-at.bofh.it> <shq4p-6gS-15@gated-at.bofh.it> <snXK1-4oA-3@gated-at.bofh.it> <sowHL-2uG-13@gated-at.bofh.it> <sp4Jr-Xg-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On 06/10/2016 01:18, Benjamin Herrenschmidt wrote: > On Tue, 2016-10-04 at 13:02 +0100, John Garry wrote: >> Right, so I think Zhichang can make the necessary generic changes to >> 8250 OF driver to support IO port as well as MMIO-based. >> >> However an LPC-based earlycon driver is still required. >> >> A note on hip07-based D05 (for those unaware): this does not use >> LPC-based uart. It uses PL011. The hardware guys have managed some >> trickery where they loopback the serial line around the BMC/CPLD. But we >> still need it for hip06 D03 and any other boards which want to use LPC >> bus for uart. >> >> A question on SBSA: does it propose how to provide serial via BMC for SOL? > > Probably another reason to keep 8250 as a legal option ... The (very > popular) Aspeed BMCs tend to do this via a 8250-looking virtual UART on > LPC. > > Cheers, > Ben, I think we're talking about the same thing for our LPC-based UART. John > > > . >
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Re: [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06 Jon Masters <jcm@jonmasters.org> - 2016-10-03 00:50 +0200
Re: [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06 John Garry <john.garry@huawei.com> - 2016-10-04 14:10 +0200
Re: [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06 Benjamin Herrenschmidt <benh@kernel.crashing.org> - 2016-10-06 02:30 +0200
Re: [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06 John Garry <john.garry@huawei.com> - 2016-10-06 15:40 +0200
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