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Re: [PATCH] PCI: rockchip: Support quirk to disable 5 GT/s (PCIe 2.x) link rate

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On Thu, Sep 22, 2016 at 10:31:18AM -0700, Brian Norris wrote:
> rk3399 supports PCIe 2.x link speeds marginally at best, and on some
> boards, the link won't train at 5 GT/s at all. Rather than sacrifice 500
> ms waiting for training that will never happen, let's support a device
> tree quirk flag to disable generation 2 speeds entirely.
> 
> Signed-off-by: Brian Norris <briannorris@chromium.org>
> ---
>  .../devicetree/bindings/pci/rockchip-pcie.txt      |  2 +
>  drivers/pci/host/pcie-rockchip.c                   | 57 +++++++++++++---------
>  2 files changed, 37 insertions(+), 22 deletions(-)

Acked-by: Rob Herring <robh@kernel.org>

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Thread

[PATCH] PCI: rockchip: Support quirk to disable 5 GT/s (PCIe 2.x) link rate Brian Norris <briannorris@chromium.org> - 2016-09-22 19:40 +0200
  Re: [PATCH] PCI: rockchip: Support quirk to disable 5 GT/s (PCIe 2.x)  link rate Shawn Lin <shawn.lin@rock-chips.com> - 2016-09-23 02:30 +0200
    Re: [PATCH] PCI: rockchip: Support quirk to disable 5 GT/s (PCIe  2.x) link rate Brian Norris <briannorris@chromium.org> - 2016-09-23 03:20 +0200
      Re: [PATCH] PCI: rockchip: Support quirk to disable 5 GT/s (PCIe 2.x)  link rate Shawn Lin <shawn.lin@rock-chips.com> - 2016-09-23 03:40 +0200
  Re: [PATCH] PCI: rockchip: Support quirk to disable 5 GT/s (PCIe  2.x) link rate Rob Herring <robh@kernel.org> - 2016-09-23 23:50 +0200
  Re: [PATCH] PCI: rockchip: Support quirk to disable 5 GT/s (PCIe  2.x) link rate Bjorn Helgaas <helgaas@kernel.org> - 2016-09-24 02:00 +0200

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