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Re: [PATCH 2/4] ARM: dts: STiH407-family: Provide interconnect clock for consumption in ST SDHCI

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Hi Lee


On 09/08/2016 11:11 AM, Lee Jones wrote:
> The STiH4{07,10} platform contains some interconnect clocks which are used
> by various IPs.  If these clocks aren't handled correctly by ST's SDHCI
> driver MMC will break and the following output can be observed:
>
> [   13.916949] mmc0: Timeout waiting for hardware interrupt.
> [   13.922349] sdhci: =========== REGISTER DUMP (mmc0)===========
> [   13.928175] sdhci: Sys addr: 0x00000000 | Version:  0x00001002
> [   13.933999] sdhci: Blk size: 0x00007040 | Blk cnt:  0x00000001
> [   13.939825] sdhci: Argument: 0x00fffff0 | Trn mode: 0x00000013
> [   13.945650] sdhci: Present:  0x1fff0206 | Host ctl: 0x00000011
> [   13.951475] sdhci: Power:    0x0000000f | Blk gap:  0x00000080
> [   13.957300] sdhci: Wake-up:  0x00000000 | Clock:    0x00003f07
> [   13.963126] sdhci: Timeout:  0x00000004 | Int stat: 0x00000000
> [   13.968952] sdhci: Int enab: 0x02ff008b | Sig enab: 0x02ff008b
> [   13.974777] sdhci: AC12 err: 0x00000000 | Slot int: 0x00000000
> [   13.980602] sdhci: Caps:     0x21ed3281 | Caps_1:   0x00000000
> [   13.986428] sdhci: Cmd:      0x0000063a | Max curr: 0x00000000
> [   13.992252] sdhci: Host ctl2: 0x00000000
> [   13.996166] sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x7c048200
> [   14.001990] sdhci: ===========================================
> [   14.009802] mmc0: Got data interrupt 0x02000000 even though no data operation was in progress.
>
> Cc: stable@vger.kernel.org
> Tested-by: Peter Griffin <peter.griffin@linaro.org>
> Signed-off-by: Lee Jones <lee.jones@linaro.org>
> ---
>  arch/arm/boot/dts/stih407-family.dtsi | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
> index 55ecfbe..744c5bc 100644
> --- a/arch/arm/boot/dts/stih407-family.dtsi
> +++ b/arch/arm/boot/dts/stih407-family.dtsi
> @@ -550,8 +550,9 @@
>  			interrupt-names = "mmcirq";
>  			pinctrl-names = "default";
>  			pinctrl-0 = <&pinctrl_mmc0>;
> -			clock-names = "mmc";
> -			clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
> +			clock-names = "mmc", "icn";
> +			clocks = <&clk_s_c0_flexgen CLK_MMC_0>,
> +				 <&clk_s_c0_flexgen CLK_RX_ICN_HVA>;
>  			bus-width = <8>;
>  		};
>  
> @@ -564,8 +565,9 @@
>  			interrupt-names = "mmcirq";
>  			pinctrl-names = "default";
>  			pinctrl-0 = <&pinctrl_sd1>;
> -			clock-names = "mmc";
> -			clocks = <&clk_s_c0_flexgen CLK_MMC_1>;
> +			clock-names = "mmc", "icn";
> +			clocks = <&clk_s_c0_flexgen CLK_MMC_1>,
> +				 <&clk_s_c0_flexgen CLK_RX_ICN_HVA>;
>  			resets = <&softreset STIH407_MMC1_SOFTRESET>;
>  			bus-width = <4>;
>  		};

Applied

Thanks

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[PATCH 0/4] ARM: MMC: USB: Fix clocking Lee Jones <lee.jones@linaro.org> - 2016-09-08 11:20 +0200
  [PATCH 2/4] ARM: dts: STiH407-family: Provide interconnect clock for consumption in ST SDHCI Lee Jones <lee.jones@linaro.org> - 2016-09-08 11:20 +0200
    Re: [PATCH 2/4] ARM: dts: STiH407-family: Provide interconnect clock  for consumption in ST SDHCI Patrice Chotard <patrice.chotard@st.com> - 2016-09-08 16:00 +0200
    Re: [PATCH 2/4] ARM: dts: STiH407-family: Provide interconnect clock  for consumption in ST SDHCI Patrice Chotard <patrice.chotard@st.com> - 2016-09-08 16:10 +0200
  [PATCH 1/4] ARM: dts: STiH410: Handle interconnect clock required by EHCI/OHCI (USB) Lee Jones <lee.jones@linaro.org> - 2016-09-08 11:20 +0200
    Re: [PATCH 1/4] ARM: dts: STiH410: Handle interconnect clock required  by EHCI/OHCI (USB) Patrice Chotard <patrice.chotard@st.com> - 2016-09-08 16:00 +0200
    Re: [PATCH 1/4] ARM: dts: STiH410: Handle interconnect clock required  by EHCI/OHCI (USB) Patrice Chotard <patrice.chotard@st.com> - 2016-09-08 16:10 +0200
  [PATCH 3/4] dt-bindings: mmc: sdhci-st: Mention the discretionary "icn" clock Lee Jones <lee.jones@linaro.org> - 2016-09-08 11:20 +0200
    Re: [PATCH 3/4] dt-bindings: mmc: sdhci-st: Mention the discretionary  "icn" clock Ulf Hansson <ulf.hansson@linaro.org> - 2016-09-09 14:00 +0200

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