Re: [RESEND PATCH v6] x86/hpet: Reduce HPET counter read contention

From	Thomas Gleixner <tglx@linutronix.de>
Newsgroups	linux.kernel
Subject	Re: [RESEND PATCH v6] x86/hpet: Reduce HPET counter read contention
Date	2016-09-06 18:00 +0200
Message-ID	<seqX0-3T3-15@gated-at.bofh.it> (permalink)
References	<seqtY-3JB-37@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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On Tue, 6 Sep 2016, Waiman Long wrote:
> 
> This is done by using a combination word with a sequence number and
> a bit lock. The CPU that gets the bit lock will be responsible for
> reading the HPET counter and update the sequence number. The others
> will monitor the change in sequence number and grab the HPET counter
> value accordingly. This change is only enabled on SMP configuration.

That hardly matches the implementation.
 
Thanks,

	tglx

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[RESEND PATCH v6] x86/hpet: Reduce HPET counter read contention Waiman Long <Waiman.Long@hpe.com> - 2016-09-06 17:30 +0200
  Re: [RESEND PATCH v6] x86/hpet: Reduce HPET counter read contention Prarit Bhargava <prarit@redhat.com> - 2016-09-06 17:40 +0200
  Re: [RESEND PATCH v6] x86/hpet: Reduce HPET counter read  contention Thomas Gleixner <tglx@linutronix.de> - 2016-09-06 18:00 +0200

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