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| From | John Garry <john.garry@huawei.com> |
| Newsgroups | linux.kernel |
| Subject | [PATCH 01/15] hisi_sas: save completion queue read pointer |
| Date | Tue, 06 Sep 2016 17:40:01 +0200 |
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Optimise by saving an avoidable read in the cq
interrupt.
The queue read pointer will only be updated
by software, so don't bother re-reading
what was already written in the previous interrupt.
Signed-off-by: John Garry <john.garry@huawei.com>
---
drivers/scsi/hisi_sas/hisi_sas.h | 1 +
drivers/scsi/hisi_sas/hisi_sas_v1_hw.c | 6 ++----
drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 5 ++---
3 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/scsi/hisi_sas/hisi_sas.h b/drivers/scsi/hisi_sas/hisi_sas.h
index ca55ec2..9410335 100644
--- a/drivers/scsi/hisi_sas/hisi_sas.h
+++ b/drivers/scsi/hisi_sas/hisi_sas.h
@@ -94,6 +94,7 @@ struct hisi_sas_port {
struct hisi_sas_cq {
struct hisi_hba *hisi_hba;
+ int rd_point;
int id;
};
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
index 1abbc2e..3b31b20 100644
--- a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
+++ b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
@@ -1565,14 +1565,11 @@ static irqreturn_t cq_interrupt_v1_hw(int irq, void *p)
struct hisi_sas_complete_v1_hdr *complete_queue =
(struct hisi_sas_complete_v1_hdr *)
hisi_hba->complete_hdr[queue];
- u32 irq_value, rd_point, wr_point;
+ u32 irq_value, rd_point = cq->rd_point, wr_point;
irq_value = hisi_sas_read32(hisi_hba, OQ_INT_SRC);
hisi_sas_write32(hisi_hba, OQ_INT_SRC, 1 << queue);
-
- rd_point = hisi_sas_read32(hisi_hba,
- COMPL_Q_0_RD_PTR + (0x14 * queue));
wr_point = hisi_sas_read32(hisi_hba,
COMPL_Q_0_WR_PTR + (0x14 * queue));
@@ -1600,6 +1597,7 @@ static irqreturn_t cq_interrupt_v1_hw(int irq, void *p)
}
/* update rd_point */
+ cq->rd_point = rd_point;
hisi_sas_write32(hisi_hba, COMPL_Q_0_RD_PTR + (0x14 * queue), rd_point);
return IRQ_HANDLED;
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
index bf9b693..11006c9 100644
--- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
+++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
@@ -2049,7 +2049,7 @@ static irqreturn_t cq_interrupt_v2_hw(int irq_no, void *p)
struct hisi_sas_slot *slot;
struct hisi_sas_itct *itct;
struct hisi_sas_complete_v2_hdr *complete_queue;
- u32 irq_value, rd_point, wr_point, dev_id;
+ u32 irq_value, rd_point = cq->rd_point, wr_point, dev_id;
int queue = cq->id;
complete_queue = hisi_hba->complete_hdr[queue];
@@ -2057,8 +2057,6 @@ static irqreturn_t cq_interrupt_v2_hw(int irq_no, void *p)
hisi_sas_write32(hisi_hba, OQ_INT_SRC, 1 << queue);
- rd_point = hisi_sas_read32(hisi_hba, COMPL_Q_0_RD_PTR +
- (0x14 * queue));
wr_point = hisi_sas_read32(hisi_hba, COMPL_Q_0_WR_PTR +
(0x14 * queue));
@@ -2106,6 +2104,7 @@ static irqreturn_t cq_interrupt_v2_hw(int irq_no, void *p)
}
/* update rd_point */
+ cq->rd_point = rd_point;
hisi_sas_write32(hisi_hba, COMPL_Q_0_RD_PTR + (0x14 * queue), rd_point);
return IRQ_HANDLED;
}
--
1.9.1
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[PATCH 00/15] hisi_sas misc fixes and minor optimisations John Garry <john.garry@huawei.com> - 2016-09-06 17:40 +0200 [PATCH 01/15] hisi_sas: save completion queue read pointer John Garry <john.garry@huawei.com> - 2016-09-06 17:40 +0200 [PATCH 10/15] hisi_sas: fix HBA SAS addr endianness for v2 hw John Garry <john.garry@huawei.com> - 2016-09-06 17:40 +0200 [PATCH 08/15] hisi_sas: fix a potential warning for sata disk ejection John Garry <john.garry@huawei.com> - 2016-09-06 17:40 +0200 [PATCH 07/15] hisi_sas: fix phy8 linkrate calculation in phy_up_v2_hw() John Garry <john.garry@huawei.com> - 2016-09-06 17:40 +0200 [PATCH 15/15] hisi_sas: send three identify before phy up John Garry <john.garry@huawei.com> - 2016-09-06 17:40 +0200 [PATCH 02/15] hisi_sas: save delivery queue write pointer John Garry <john.garry@huawei.com> - 2016-09-06 17:40 +0200 [PATCH 04/15] hisi_sas: only zero slot memory when reused John Garry <john.garry@huawei.com> - 2016-09-06 17:40 +0200 [PATCH 09/15] hisi_sas: set dma mask before allocate DMA memory John Garry <john.garry@huawei.com> - 2016-09-06 17:40 +0200
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