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Re: [PATCH v3 1/1] x86/platform/intel-mid: Implement power off sequence

From Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Newsgroups linux.kernel
Subject Re: [PATCH v3 1/1] x86/platform/intel-mid: Implement power off sequence
Date 2016-09-07 17:10 +0200
Message-ID <seMEa-1mo-15@gated-at.bofh.it> (permalink)
References <seKsG-8fI-21@gated-at.bofh.it> <seMuu-13P-53@gated-at.bofh.it>
Organization Intel Finland Oy

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On Wed, 2016-09-07 at 15:53 +0100, Bryan O'Donoghue wrote:
> On Wed, 2016-09-07 at 15:39 +0300, Andy Shevchenko wrote:
> > 
> > +#define IPCMSG_COLD_OFF                0x80    /* Only for Tangier
> > */
> 
> Andy, I'm wondering are these magic numbers documented somewhere ?

This one somewhere in SCU HAS, I can check it later (if I have access to
it).

-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy

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Thread

[PATCH v3 1/1] x86/platform/intel-mid: Implement power off sequence Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-09-07 14:50 +0200
  Re: [PATCH v3 1/1] x86/platform/intel-mid: Implement power off  sequence Bryan O'Donoghue <pure.logic@nexus-software.ie> - 2016-09-07 17:00 +0200
    Re: [PATCH v3 1/1] x86/platform/intel-mid: Implement power off  sequence Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-09-07 17:10 +0200
  [tip:x86/platform] x86/platform/intel-mid: Implement power off  sequence tip-bot for Andy Shevchenko <tipbot@zytor.com> - 2016-09-08 08:40 +0200

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