Re: chipidea: udc: kernel panic in isr_setup_status_phase

From	Clemens Gruber <clemens.gruber@pqgruber.com>
Newsgroups	linux.kernel
Subject	Re: chipidea: udc: kernel panic in isr_setup_status_phase
Date	2016-09-02 18:50 +0200
Message-ID	<scZPb-1TH-5@gated-at.bofh.it> (permalink)
References	(3 earlier) <salCy-57G-31@gated-at.bofh.it> <sbcQx-573-11@gated-at.bofh.it> <sbkuJ-1sj-1@gated-at.bofh.it> <sbV1g-7PN-11@gated-at.bofh.it> <scM5z-1ze-3@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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On Fri, Sep 02, 2016 at 09:55:52AM +0800, Peter Chen wrote:
> Do you have other 5V to USB_H1_VBUS? USB PHY needs 5V input voltage
> as the source for USB LDO (3.0v), either from OTG or Host 1. I suspect
> the lower vbus voltage causes the USB LDO voltage less than 3.0v, then
> cause the unstable for USB PHY. If possible, you can connect MAIN 5V
> (if it exists) directly to USB_H1_VBUS to see if this problem is fixed.

Yes, USB_H1_VBUS is supplied from internal 5V and it is accurate (+/-
0.03V). The USB_H_EN signal enables USB_H1_VBUS through a MIC2026-1.

The USB_OTG_VBUS signal from the picture with 4.69V came from the host
PC and is not under our control.

I read in the ReferenceManual that the USBPHY defaults to USB_H1_VBUS if
both USB_OTG_VBUS and USB_H1_VBUS are available.
If we imagine the following situation: USB OTG cable is plugged-in, the
board is powered on, USB_OTG_VBUS is supplied externally and USBPHY uses
it because USB_H1_EN is not high yet and did not enable USB_H1_VBUS.
If the USBPHY started out being supplied by USB_OTG_VBUS and later on,
USB_H1_VBUS comes up, will the USBPHY switch to USB_H1_VBUS immediately
or stay at being supplied by USB_OTG_VBUS as long as that is available?

> Great. Can you see the sudden lower for vbus again? If it still exists, it may
> be GND issue.

Yes it is still visible. Does not seem to be a problem though.

> Avoid NULL pointer deference is necessary. Patch is welcome :)

Yes, but should we also stop the gadget driver and print an error
message? Or just return from the isr and neither report nor stop?

Regards,
Clemens

Thread

Re: chipidea: udc: kernel panic in isr_setup_status_phase Clemens Gruber <clemens.gruber@pqgruber.com> - 2016-08-26 01:50 +0200
  Re: chipidea: udc: kernel panic in isr_setup_status_phase Peter Chen <hzpeterchen@gmail.com> - 2016-08-26 11:30 +0200
  Re: chipidea: udc: kernel panic in isr_setup_status_phase Peter Chen <hzpeterchen@gmail.com> - 2016-08-26 11:30 +0200
    Re: chipidea: udc: kernel panic in isr_setup_status_phase Clemens Gruber <clemens.gruber@pqgruber.com> - 2016-08-28 20:20 +0200
      Re: chipidea: udc: kernel panic in isr_setup_status_phase Peter Chen <hzpeterchen@gmail.com> - 2016-08-29 04:30 +0200
        Re: chipidea: udc: kernel panic in isr_setup_status_phase Clemens Gruber <clemens.gruber@pqgruber.com> - 2016-08-30 19:30 +0200
          Re: chipidea: udc: kernel panic in isr_setup_status_phase Peter Chen <hzpeterchen@gmail.com> - 2016-09-02 04:10 +0200
            Re: chipidea: udc: kernel panic in isr_setup_status_phase Clemens Gruber <clemens.gruber@pqgruber.com> - 2016-09-02 18:50 +0200
              Re: chipidea: udc: kernel panic in isr_setup_status_phase Peter Chen <hzpeterchen@gmail.com> - 2016-09-05 05:20 +0200
                Re: chipidea: udc: kernel panic in isr_setup_status_phase Clemens Gruber <clemens.gruber@pqgruber.com> - 2016-09-05 19:30 +0200

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