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Groups > linux.kernel > #1474926
| From | Chen-Yu Tsai <wens@csie.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 1/6] clk: sunxi-ng: div: Add mux table macros |
| Date | 2016-09-02 09:30 +0200 |
| Message-ID | <scR5f-4S3-7@gated-at.bofh.it> (permalink) |
| References | <scB0t-2VS-1@gated-at.bofh.it> <scB0u-2VS-11@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Thu, Sep 1, 2016 at 10:16 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Add some macros to ease the declaration of clocks that are using them.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
> ---
> drivers/clk/sunxi-ng/ccu_div.h | 28 +++++++++++++++++++++-------
> 1 file changed, 21 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu_div.h b/drivers/clk/sunxi-ng/ccu_div.h
> index 5d98549e23a6..a5c9eaf90e84 100644
> --- a/drivers/clk/sunxi-ng/ccu_div.h
> +++ b/drivers/clk/sunxi-ng/ccu_div.h
> @@ -77,13 +77,16 @@ struct ccu_div {
> _shift, _width, _table, 0, \
> _flags)
>
> -#define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg, \
> - _mshift, _mwidth, _muxshift, _muxwidth, \
> - _gate, _flags) \
> +#define SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \
> + _parents, _table, \
> + _reg, \
> + _mshift, _mwidth, \
> + _muxshift, _muxwidth, \
> + _gate, _flags) \
> struct ccu_div _struct = { \
> .enable = _gate, \
> .div = _SUNXI_CCU_DIV(_mshift, _mwidth), \
> - .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \
> + .mux = _SUNXI_CCU_MUX_TABLE(_muxshift, _muxwidth, _table), \
> .common = { \
> .reg = _reg, \
> .hw.init = CLK_HW_INIT_PARENTS(_name, \
> @@ -93,12 +96,23 @@ struct ccu_div {
> }, \
> }
>
> +#define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg, \
> + _mshift, _mwidth, _muxshift, _muxwidth, \
> + _gate, _flags) \
> + SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \
> + _parents, NULL, \
> + _reg, _mshift, _mwidth, \
> + _muxshift, _muxwidth, \
> + _gate, _flags)
> +
> #define SUNXI_CCU_M_WITH_MUX(_struct, _name, _parents, _reg, \
> _mshift, _mwidth, _muxshift, _muxwidth, \
> _flags) \
> - SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg, \
> - _mshift, _mwidth, _muxshift, _muxwidth, \
> - 0, _flags)
> + SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name, \
> + _parents, NULL, \
> + _reg, _mshift, _mwidth, \
> + _muxshift, _muxwidth, \
> + 0, _flags)
You probably didn't need to change this one though.
>
>
> #define SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg, \
> --
> 2.9.2
>
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[PATCH 0/6] clk: sunxi-ng: Introduce support for A23 and A33 CCUs Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-09-01 16:20 +0200
[PATCH 3/6] clk: sunxi-ng: Add N-class clocks support Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-09-01 16:20 +0200
Re: [PATCH 3/6] clk: sunxi-ng: Add N-class clocks support Chen-Yu Tsai <wens@csie.org> - 2016-09-05 05:40 +0200
[PATCH 1/6] clk: sunxi-ng: div: Add mux table macros Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-09-01 16:20 +0200
Re: [PATCH 1/6] clk: sunxi-ng: div: Add mux table macros Chen-Yu Tsai <wens@csie.org> - 2016-09-02 09:30 +0200
[PATCH 5/6] clk: sunxi-ng: Add A23 CCU Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-09-01 16:20 +0200
[PATCH 4/6] clk: sunxi-ng: Add A33 CCU support Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-09-01 16:20 +0200
Re: [PATCH 4/6] clk: sunxi-ng: Add A33 CCU support Chen-Yu Tsai <wens@csie.org> - 2016-09-05 08:40 +0200
Re: [PATCH 4/6] clk: sunxi-ng: Add A33 CCU support Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-09-05 12:00 +0200
Re: [PATCH 4/6] clk: sunxi-ng: Add A33 CCU support Chen-Yu Tsai <wens@csie.org> - 2016-09-05 12:30 +0200
[PATCH 6/6] ARM: sun8i: Convert the A23 and A33 to the CCU Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-09-01 16:20 +0200
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