Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1470433

[PATCH 03/28] coresight: always use stashed trace id value in etm4_trace_id

Show all headers | View raw

From: Sudeep Holla <sudeep.holla@arm.com>

etm4_trace_id is not guaranteed to be executed on the CPU whose ETM is
being accessed. This leads to exception similar to below one if the
CPU whose ETM is being accessed is in deeper idle states. So it must
be executed on the CPU whose ETM is being accessed.

Unhandled fault: synchronous external abort (0x96000210) at 0xffff000008db4040
Internal error: : 96000210 [#1] PREEMPT SMP
Modules linked in:
CPU: 5 PID: 5979 Comm: etm.sh Not tainted 4.7.0-rc3 #159
Hardware name: ARM Juno development board (r2) (DT)
task: ffff80096dd34b00 ti: ffff80096dfe4000 task.ti: ffff80096dfe4000
PC is at etm4_trace_id+0x5c/0x90
LR is at etm4_trace_id+0x3c/0x90
Call trace:
 etm4_trace_id+0x5c/0x90
 coresight_id_match+0x78/0xa8
 bus_for_each_dev+0x60/0xa0
 coresight_enable+0xc0/0x1b8
 enable_source_store+0x3c/0x70
 dev_attr_store+0x18/0x28
 sysfs_kf_write+0x48/0x58
 kernfs_fop_write+0x14c/0x1e0
 __vfs_write+0x1c/0x100
 vfs_write+0xa0/0x1b8
 SyS_write+0x44/0xa0
 el0_svc_naked+0x24/0x28

However, TRCTRACEIDR is not guaranteed to hold the previous programmed
trace id if it enters deeper idle states. Further, the trace id that is
computed in etm4_init_trace_id is programmed into TRCTRACEIDR only in
etm4_enable_hw which happens much later in the sequence after
coresight_id_match is executed from enable_source_store.

This patch simplifies etm4_trace_id by returning the stashed trace id
value similar to etm4_cpu_id.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/hwtracing/coresight/coresight-etm4x.c | 16 +---------------
 1 file changed, 1 insertion(+), 15 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 1a5e0d14c1dd..17e2e81d2e90 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -79,22 +79,8 @@ static int etm4_cpu_id(struct coresight_device *csdev)
 static int etm4_trace_id(struct coresight_device *csdev)
 {
 	struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
-	unsigned long flags;
-	int trace_id = -1;
 
-	if (!local_read(&drvdata->mode))
-		return drvdata->trcid;
-
-	spin_lock_irqsave(&drvdata->spinlock, flags);
-
-	CS_UNLOCK(drvdata->base);
-	trace_id = readl_relaxed(drvdata->base + TRCTRACEIDR);
-	trace_id &= ETM_TRACEID_MASK;
-	CS_LOCK(drvdata->base);
-
-	spin_unlock_irqrestore(&drvdata->spinlock, flags);
-
-	return trace_id;
+	return drvdata->trcid;
 }
 
 static void etm4_enable_hw(void *info)
-- 
2.7.4

Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread

Thread

[PATCH 00/28] coresight: next v4.8-rc3  Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:30 +0200
  [PATCH 20/28] coresight: etm-perf: pass struct perf_event to source::enable/disable() Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:30 +0200
  [PATCH 03/28] coresight: always use stashed trace id value in etm4_trace_id Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:30 +0200
  [PATCH 21/28] coresight: remove duplicated enumeration Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:30 +0200
  [PATCH 02/28] coresight-stm: support mmapping channel regions with mmio_addr Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:30 +0200
  [PATCH 26/28] coresight: etm4x: configuring include/exclude function Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:30 +0200
  [PATCH 17/28] coresight: tmc: Delete an unnecessary check before the function call "kfree" Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:30 +0200
  [PATCH 24/28] coresight: etm4x: cleaning up default filter configuration Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:30 +0200
  [PATCH 04/28] coresight: Remove erroneous dma_free_coherent in tmc_probe Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:30 +0200
  [PATCH 09/28] coresight: Cleanup TMC status check Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:30 +0200
  [PATCH 28/28] coresight: etm4x: adding configurable start/stop filtering Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:30 +0200
  [PATCH 08/28] coresight: etmv4: Fix ETMv4x peripheral ID table Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:30 +0200
  [PATCH 25/28] coresight: etm4x: adding range filter configuration function Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:30 +0200
  [PATCH 16/28] coresight: etm4x: remove duplicated include from coresight-etm4x.c Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:40 +0200
  [PATCH 10/28] coresight: Add better messages for coresight_timeout Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:40 +0200
  [PATCH 14/28] hwtracing: coresight: of_coresight: add missing of_node_put after calling of_parse_phandle Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:40 +0200
  [PATCH 15/28] coresight: Use local coresight_desc instances Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:40 +0200
  [PATCH 13/28] coresight-etm3x: Add ARM ETM 3.5 Cortex-A5 peripheral ID Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:40 +0200
  [PATCH 11/28] coresight: delay initialisation when children are missing Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:50 +0200
  [PATCH 12/28] coresight: add PM runtime calls to coresight_simple_func() Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:50 +0200
  [PATCH 06/28] coresight: Fix csdev connections initialisation Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:50 +0200
  [PATCH 23/28] coresight: etm4x: split default and filter configuration Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-25 23:50 +0200
  [PATCH 07/28] coresight: tmc: Limit the trace to available data Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-26 00:00 +0200
  [PATCH 19/28] coresight: fix handling of ETM trace register access via sysfs Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-26 00:00 +0200
  [PATCH 27/28] coresight: etm4x: adding configurable address range filtering Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-26 00:00 +0200
  [PATCH 01/28] coresight: access conn->child_name only if it's initialised Mathieu Poirier <mathieu.poirier@linaro.org> - 2016-08-26 00:30 +0200
  Re: [PATCH 00/28] coresight: next v4.8-rc3 Greg KH <gregkh@linuxfoundation.org> - 2016-08-31 13:10 +0200

csiph-web