Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1558562
| From | Mika Westerberg <mika.westerberg@linux.intel.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v2 3/6] pinctrl: Add a possibility to configure pins from a gpiolib based drivers |
| Date | 2017-01-13 17:40 +0100 |
| Message-ID | <sZd3s-389-29@gated-at.bofh.it> (permalink) |
| References | (1 earlier) <sY5KG-2vR-47@gated-at.bofh.it> <sYqP7-7ld-23@gated-at.bofh.it> <sYria-7uK-7@gated-at.bofh.it> <sYJRM-2er-21@gated-at.bofh.it> <sZc7u-2zn-41@gated-at.bofh.it> |
| Organization | Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo |
On Fri, Jan 13, 2017 at 04:36:42PM +0100, Linus Walleij wrote: > On Thu, Jan 12, 2017 at 10:22 AM, Mika Westerberg > <mika.westerberg@linux.intel.com> wrote: > > > Hmm, looking at users of .set_debounce() I can see that the debounce > > time can be quite large. For example some signals which are connected to > > physical push-buttons may need > 64ms debounce time. > > > > However, the current pinconfig value is defined to be unsigned long > > which on 32-bit architecture is 32-bits. From that the higher 16-bits > > are used as config leaving the value to be 16-bits. This gives maximum > > debounce time of 65535us. I don't think it can cover all the uses of > > .set_debounce(). This could also be problematic when specifying values > > for pull resistors. > > > > One solution is to convert the packed value to be u64 instead, leaving > > up to 48-bits for the value. Alternatively we could provide a scale > > field with the packed format. > > Hm yeah as long as all in-kernel users survive I don't see why we > couldn't just make it 64bit. Is it a big deal? As long as everyone is using those macros and inline functions from pinconf-generic.h, I think the conversion should be pretty straightforward.
Back to linux.kernel | Previous | Next — Previous in thread | Find similar | Unroll thread
[PATCH v2 3/6] pinctrl: Add a possibility to configure pins from a gpiolib based drivers Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-01-10 15:40 +0100
Re: [PATCH v2 3/6] pinctrl: Add a possibility to configure pins from a gpiolib based drivers Linus Walleij <linus.walleij@linaro.org> - 2017-01-11 14:10 +0100
Re: [PATCH v2 3/6] pinctrl: Add a possibility to configure pins from a gpiolib based drivers Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-01-11 14:40 +0100
Re: [PATCH v2 3/6] pinctrl: Add a possibility to configure pins from a gpiolib based drivers Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-01-12 10:30 +0100
Re: [PATCH v2 3/6] pinctrl: Add a possibility to configure pins from a gpiolib based drivers Linus Walleij <linus.walleij@linaro.org> - 2017-01-13 16:40 +0100
Re: [PATCH v2 3/6] pinctrl: Add a possibility to configure pins from a gpiolib based drivers Mika Westerberg <mika.westerberg@linux.intel.com> - 2017-01-13 17:40 +0100
csiph-web