Re: x86-64: Maintain 16-byte stack alignment

From	Ard Biesheuvel <ard.biesheuvel@linaro.org>
Newsgroups	linux.kernel
Subject	Re: x86-64: Maintain 16-byte stack alignment
Date	2017-01-12 09:10 +0100
Message-ID	<sYICm-1zl-9@gated-at.bofh.it> (permalink)
References	<sY5KF-2vR-21@gated-at.bofh.it> <sY8yR-4e0-15@gated-at.bofh.it> <sYGTU-wt-1@gated-at.bofh.it>
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On 12 January 2017 at 06:12, Herbert Xu <herbert@gondor.apana.org.au> wrote:
> On Tue, Jan 10, 2017 at 05:30:48PM +0000, Ard Biesheuvel wrote:
>>
>> Apologies for introducing this breakage. It seemed like an obvious and
>> simple cleanup, so I didn't even bother to mention it in the commit
>> log, but if the kernel does not guarantee 16 byte alignment, I guess
>> we should revert to the old method. If SSE instructions are the only
>> ones that require this alignment, then I suppose not having a ABI
>> conforming stack pointer should not be an issue in general.
>
> BTW Ard, what is the stack alignment on ARM64?
>

[From memory] the arm64 ELF psABI mandates a 16 byte stack alignment
at function entry, and 8 byte alignment at all other times. This means
compiled code will typically preserve 16 byte alignment, and
__aligned(16) on a stack variable will likely not result in an
explicit alignment of the stack pointer *. But the arm64 ISA does not
have any load/store instructions that would trigger a misalignment
fault on an address that is 8 byte aligned but not 16 byte aligned, so
the situation is very different from x86 (assuming I am correct in
asserting that there are no failure modes resulting from a misaligned
stack other than this one and a potential performance hit)

* I didn't check whether the exception handling realigns the stack
pointer on nested exceptions (arm64 has separate IRQ stacks)

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x86-64: Maintain 16-byte stack alignment Herbert Xu <herbert@gondor.apana.org.au> - 2017-01-10 15:40 +0100
  Re: x86-64: Maintain 16-byte stack alignment Ard Biesheuvel <ard.biesheuvel@linaro.org> - 2017-01-10 18:40 +0100
    Re: x86-64: Maintain 16-byte stack alignment Ard Biesheuvel <ard.biesheuvel@linaro.org> - 2017-01-10 20:20 +0100
      Re: x86-64: Maintain 16-byte stack alignment Andy Lutomirski <luto@amacapital.net> - 2017-01-10 20:30 +0100
        Re: x86-64: Maintain 16-byte stack alignment Ard Biesheuvel <ard.biesheuvel@linaro.org> - 2017-01-10 21:10 +0100
          Re: x86-64: Maintain 16-byte stack alignment Andy Lutomirski <luto@amacapital.net> - 2017-01-11 00:30 +0100
            Re: x86-64: Maintain 16-byte stack alignment Herbert Xu <herbert@gondor.apana.org.au> - 2017-01-11 04:30 +0100
        Re: x86-64: Maintain 16-byte stack alignment Herbert Xu <herbert@gondor.apana.org.au> - 2017-01-11 04:30 +0100
    Re: x86-64: Maintain 16-byte stack alignment Andy Lutomirski <luto@amacapital.net> - 2017-01-10 20:50 +0100
      Re: x86-64: Maintain 16-byte stack alignment Herbert Xu <herbert@gondor.apana.org.au> - 2017-01-11 04:20 +0100
    Re: x86-64: Maintain 16-byte stack alignment Herbert Xu <herbert@gondor.apana.org.au> - 2017-01-11 04:20 +0100
    Re: x86-64: Maintain 16-byte stack alignment Herbert Xu <herbert@gondor.apana.org.au> - 2017-01-12 07:20 +0100
      Re: x86-64: Maintain 16-byte stack alignment Herbert Xu <herbert@gondor.apana.org.au> - 2017-01-12 09:10 +0100
      Re: x86-64: Maintain 16-byte stack alignment Ard Biesheuvel <ard.biesheuvel@linaro.org> - 2017-01-12 09:10 +0100

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