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Groups > linux.kernel > #1552136
| From | Catalin Marinas <catalin.marinas@arm.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v3 3/9] arm64: cpufeature: Cleanup feature bit tables |
| Date | 2017-01-05 18:20 +0100 |
| Message-ID | <sWjRM-5ZY-39@gated-at.bofh.it> (permalink) |
| References | <sVYNk-8qL-3@gated-at.bofh.it> <sVYNk-8qL-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Wed, Jan 04, 2017 at 05:49:01PM +0000, Suzuki K. Poulose wrote: > This patch does the following clean ups : > > 1) All undescribed fields of a register are now treated as "strict" > with a safe value of 0. Hence we could leave an empty table for > describing registers which are RAZ. > > 2) ID_AA64DFR1_EL1 is RAZ and should use the table for RAZ register. > > 3) ftr_generic32 is used to represent a register with a 32bit feature > value. Rename this to ftr_singl32 to make it more obvious. Since > we don't have a 64bit singe feature register, kill ftr_generic. Nitpick: couple of "single" typos above. > > Based on a patch by Mark Rutland. > > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will.deacon@arm.com> > Reviewed-by: Mark Rutland <mark.rutland@arm.com> > Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
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[PATCH v3 3/9] arm64: cpufeature: Cleanup feature bit tables Suzuki K Poulose <suzuki.poulose@arm.com> - 2017-01-04 19:50 +0100 Re: [PATCH v3 3/9] arm64: cpufeature: Cleanup feature bit tables Catalin Marinas <catalin.marinas@arm.com> - 2017-01-05 18:20 +0100
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