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Re: [Intel-gfx] [PATCH v2] drm: add fourcc codes for 16bit R and GR

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On Wed, 04 Jan 2017, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Tue, Jan 03, 2017 at 08:02:07PM +0100, Rainer Hochecker wrote:
>> From: Rainer Hochecker <fernetmenta@online.de>
>> 
>> Now sent with git send-email:
>> 
>> Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
>> ---
>>  include/uapi/drm/drm_fourcc.h | 7 +++++++
>>  1 file changed, 7 insertions(+)
>> 
>> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
>> index a5890bf..f1ef9cb 100644
>> --- a/include/uapi/drm/drm_fourcc.h
>> +++ b/include/uapi/drm/drm_fourcc.h
>> @@ -41,10 +41,17 @@ extern "C" {
>>  /* 8 bpp Red */
>>  #define DRM_FORMAT_R8		fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
>>  
>> +/* 16 bpp Red */
>> +#define DRM_FORMAT_R16		fourcc_code('R', '1', '6', ' ') /* [15:0] R */
>> +
>>  /* 16 bpp RG */
>>  #define DRM_FORMAT_RG88		fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
>>  #define DRM_FORMAT_GR88		fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
>>  
>> +/* 32 bpp GR */
>> +#define DRM_FORMAT_RG32		fourcc_code('R', 'G', '3', '2') /* [31:0] G:R 16:16 little endian */
>> +#define DRM_FORMAT_GR32		fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
>
> Now the define's name is inconsistent, since that would suggest a 5 bpp
> format with 3 bits for R and 2 bits for G. I think what we want here for
> consistency is _RG16_16 and _GR16_16, along the lines of what Ville
> suggested.
>
> Sorry that this is such a bikeshed heaven ;-)

If there's going to be another version, please fix the commit message
while at it. "Now sent with git send-email" is useless for posterity.

BR,
Jani.


> -Daniel
>
>> +
>>  /* 8 bpp RGB */
>>  #define DRM_FORMAT_RGB332	fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
>>  #define DRM_FORMAT_BGR233	fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
>> -- 
>> 2.9.3
>> 

-- 
Jani Nikula, Intel Open Source Technology Center

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Thread

[PATCH v2] drm: add fourcc codes for 16bit R and GR Rainer Hochecker <fernetmenta@kodi.tv> - 2017-01-03 20:10 +0100
  Re: [PATCH v2] drm: add fourcc codes for 16bit R and GR Daniel Vetter <daniel@ffwll.ch> - 2017-01-04 10:00 +0100
    Re: [Intel-gfx] [PATCH v2] drm: add fourcc codes for 16bit R and GR Jani Nikula <jani.nikula@linux.intel.com> - 2017-01-04 10:10 +0100
      Re: [Intel-gfx] [PATCH v2] drm: add fourcc codes for 16bit R and GR Eric Engestrom <eric.engestrom@imgtec.com> - 2017-01-04 11:30 +0100

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