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Groups > linux.kernel > #1547698
| From | David Miller <davem@davemloft.net> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v4] sparc64: Multi-page size support |
| Date | 2016-12-27 18:40 +0100 |
| Message-ID | <sT3Tb-53g-1@gated-at.bofh.it> (permalink) |
| References | <sNZGy-4qu-7@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Nitin Gupta <nitin.m.gupta@oracle.com>
Date: Tue, 13 Dec 2016 10:03:18 -0800
> +static unsigned int sun4u_huge_tte_to_shift(pte_t entry)
> +{
> + unsigned long tte_szbits = pte_val(entry) & _PAGE_SZALL_4V;
> + unsigned int shift;
> +
> + switch (tte_szbits) {
> + case _PAGE_SZ256MB_4U:
> + shift = HPAGE_256MB_SHIFT;
> + break;
You added all the code necessary to do this on the sun4u chips that support
256MB TTEs, so you might as well enable it in the initialization code.
I'm pretty sure this is an UltraSPARC-IV and later feature.
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[PATCH v4] sparc64: Multi-page size support Nitin Gupta <nitin.m.gupta@oracle.com> - 2016-12-13 19:10 +0100 Re: [PATCH v4] sparc64: Multi-page size support David Miller <davem@davemloft.net> - 2016-12-27 18:40 +0100 Re: [PATCH v4] sparc64: Multi-page size support David Miller <davem@davemloft.net> - 2016-12-27 18:40 +0100
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