Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1546584
| From | Rob Herring <robh@kernel.org> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v10 8/8] dt-bindings: mmc: Add Cavium SOCs MMC bindings |
| Date | 2016-12-22 21:40 +0100 |
| Message-ID | <sRijD-5K0-1@gated-at.bofh.it> (permalink) |
| References | <sQ557-7DY-3@gated-at.bofh.it> <sQ559-7DY-49@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Mon, Dec 19, 2016 at 01:15:52PM +0100, Jan Glauber wrote:
> Add description of Cavium Octeon and ThunderX SOC device tree bindings.
>
> CC: Ulf Hansson <ulf.hansson@linaro.org>
> CC: Rob Herring <robh+dt@kernel.org>
> CC: Mark Rutland <mark.rutland@arm.com>
> CC: devicetree@vger.kernel.org
>
> Signed-off-by: Jan Glauber <jglauber@cavium.com>
> ---
> .../devicetree/bindings/mmc/octeon-mmc.txt | 59 ++++++++++++++++++++++
Perhaps cavium-mmc.txt would be more appropriate now.
> 1 file changed, 59 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mmc/octeon-mmc.txt
>
> diff --git a/Documentation/devicetree/bindings/mmc/octeon-mmc.txt b/Documentation/devicetree/bindings/mmc/octeon-mmc.txt
> new file mode 100644
> index 0000000..aad02eb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mmc/octeon-mmc.txt
> @@ -0,0 +1,59 @@
> +* Cavium Octeon & ThunderX MMC controller
> +
> +The highspeed MMC host controller on Caviums SoCs provides an interface
> +for MMC and SD types of memory cards.
> +
> +Supported maximum speeds are the ones of the eMMC standard 4.41 as well
> +as the speed of SD standard 4.0. Only 3.3 Volt is supported.
> +
> +Required properties:
> + - compatible : should be one of:
> + * "cavium,octeon-6130-mmc"
> + * "cavium,octeon-6130-mmc-slot"
> + * "cavium,octeon-7890-mmc"
> + * "cavium,octeon-7890-mmc-slot"
> + * "cavium,thunder-8190-mmc"
> + * "cavium,thunder-8190-mmc-slot"
> + * "cavium,thunder-8390-mmc"
> + * "cavium,thunder-8390-mmc-slot"
> + - reg : mmc controller base registers
Following PCI addressing?
> + - clocks : phandle
> +
> +Optional properties:
> + - for cd, bus-width and additional generic mmc parameters
> + please refer to mmc.txt within this directory
> + - "cavium,cmd-clk-skew" : number of coprocessor clocks before sampling command
> + - "cavium,dat-clk-skew" : number of coprocessor clocks before sampling data
> +
> +Deprecated properties:
> +- spi-max-frequency : use max-frequency instead
> +- "cavium,bus-max-width" : use bus-width instead
Drop the quotes.
> +
> +Examples:
> + - Within .dtsi:
Don't show the division between files in the example.
> + mmc_1_4: mmc@1,4 {
> + compatible = "cavium,thunder-8390-mmc";
> + reg = <0x0c00 0 0 0 0>; /* DEVFN = 0x0c (1:4) */
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&sclk>;
> + };
> +
> + - Within dts:
> + mmc-slot@0 {
Need to show this is a child node.
> + compatible = "cavium,thunder-8390-mmc-slot";
> + reg = <0>;
> + voltage-ranges = <3300 3300>;
> + max-frequency = <42000000>;
> + bus-width = <4>;
> + cap-sd-highspeed;
> + };
> + mmc-slot@1 {
> + compatible = "cavium,thunder-8390-mmc-slot";
> + reg = <1>;
> + voltage-ranges = <3300 3300>;
> + max-frequency = <42000000>;
> + bus-width = <8>;
> + cap-mmc-highspeed;
> + non-removable;
> + };
> --
> 2.9.0.rc0.21.g7777322
>
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCH v10 0/8] Cavium MMC driver Jan Glauber <jglauber@cavium.com> - 2016-12-19 13:20 +0100
[PATCH v10 6/8] mmc: thunderx: Add scatter-gather DMA support Jan Glauber <jglauber@cavium.com> - 2016-12-19 13:20 +0100
[PATCH v10 2/8] mmc: octeon: Add MMC platform driver for Octeon SOCs Jan Glauber <jglauber@cavium.com> - 2016-12-19 13:20 +0100
[PATCH v10 5/8] mmc: thunderx: Add MMC PCI driver for ThunderX SOCs Jan Glauber <jglauber@cavium.com> - 2016-12-19 13:20 +0100
[PATCH v10 8/8] dt-bindings: mmc: Add Cavium SOCs MMC bindings Jan Glauber <jglauber@cavium.com> - 2016-12-19 13:20 +0100
Re: [PATCH v10 8/8] dt-bindings: mmc: Add Cavium SOCs MMC bindings Rob Herring <robh@kernel.org> - 2016-12-22 21:40 +0100
[PATCH v10 3/8] mmc: octeon: Work-around hardware bug on cn6xxx and cnf7xxx Jan Glauber <jglauber@cavium.com> - 2016-12-19 13:20 +0100
[PATCH v10 1/8] mmc: cavium: Add core MMC driver for Cavium SOCs Jan Glauber <jglauber@cavium.com> - 2016-12-19 13:20 +0100
Re: [PATCH v10 0/8] Cavium MMC driver Ulf Hansson <ulf.hansson@linaro.org> - 2016-12-20 13:20 +0100
Re: [PATCH v10 0/8] Cavium MMC driver Ulf Hansson <ulf.hansson@linaro.org> - 2016-12-20 13:40 +0100
csiph-web