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Groups > linux.kernel > #1543671
| From | Andy Lutomirski <luto@amacapital.net> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [patch 3/3] x86/process: Optimize TIF_NOTSC switch |
| Date | 2016-12-16 19:40 +0100 |
| Message-ID | <sP5Ae-7fU-31@gated-at.bofh.it> (permalink) |
| References | <sOHoe-87a-13@gated-at.bofh.it> <sOHoe-87a-15@gated-at.bofh.it> <sOIaC-cX-45@gated-at.bofh.it> <sOWwV-19z-17@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Fri, Dec 16, 2016 at 12:50 AM, Thomas Gleixner <tglx@linutronix.de> wrote:
> On Thu, 15 Dec 2016, Andy Lutomirski wrote:
>> On Thu, Dec 15, 2016 at 8:44 AM, Thomas Gleixner <tglx@linutronix.de> wrote:
>> > +static inline void cr4_toggle_bits(unsigned long mask)
>> > +{
>> > + unsigned long cr4;
>> > +
>> > + cr4 = this_cpu_read(cpu_tlbstate.cr4);
>> > + cr4 ^= mask;
>> > + this_cpu_write(cpu_tlbstate.cr4, cr4);
>> > + __write_cr4(cr4);
>> > +}
>>
>> This scares me for the same reason as BTF, although this should at
>> least be less fragile. But how about:
>
> If that is fragile then all cr4 manipulation code is fragile because it
> relies on cpu_tlbstate.cr4. The TIF flag and that per cpu thing are kept in
> sync.
True.
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[patch 3/3] x86/process: Optimize TIF_NOTSC switch Thomas Gleixner <tglx@linutronix.de> - 2016-12-15 17:50 +0100
Re: [patch 3/3] x86/process: Optimize TIF_NOTSC switch Andy Lutomirski <luto@amacapital.net> - 2016-12-15 18:40 +0100
Re: [patch 3/3] x86/process: Optimize TIF_NOTSC switch Thomas Gleixner <tglx@linutronix.de> - 2016-12-16 10:00 +0100
Re: [patch 3/3] x86/process: Optimize TIF_NOTSC switch Andy Lutomirski <luto@amacapital.net> - 2016-12-16 19:40 +0100
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