Re: [RFC, PATCHv1 15/28] x86: detect 5-level paging support

From	hpa@zytor.com
Newsgroups	linux.kernel
Subject	Re: [RFC, PATCHv1 15/28] x86: detect 5-level paging support
Date	2016-12-15 22:00 +0100
Message-ID	<sOLia-23N-23@gated-at.bofh.it> (permalink)
References	(6 earlier) <sO4mS-7jz-15@gated-at.bofh.it> <sOFmp-6RD-7@gated-at.bofh.it> <sOItX-km-7@gated-at.bofh.it> <sOJzI-1bX-21@gated-at.bofh.it> <sOLia-23N-25@gated-at.bofh.it>
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On December 15, 2016 11:20:17 AM PST, Andi Kleen <ak@linux.intel.com> wrote:
>
>The code is not calling CPUID in any performance critical path, only
>at initialization. So any discussion about saving a few instructions
>is a complete waste of time.
>
>-Andi

Sort of.  The BIOS boot code is very space-constrained for certain legacy bootloaders to continue to work.  The BIOS boot code proper does not need PIC.

However, the existing .ifnc solution already takes care of it, so it doesn't matter.
-- 
Sent from my Android device with K-9 Mail. Please excuse my brevity.

Thread

Re: [RFC, PATCHv1 15/28] x86: detect 5-level paging support "H. Peter Anvin" <hpa@zytor.com> - 2016-12-13 23:50 +0100
  Re: [RFC, PATCHv1 15/28] x86: detect 5-level paging support Boris Petkov <bp@alien8.de> - 2016-12-14 00:10 +0100
    Re: [RFC, PATCHv1 15/28] x86: detect 5-level paging support Borislav Petkov <bp@alien8.de> - 2016-12-15 15:40 +0100
      Re: [RFC, PATCHv1 15/28] x86: detect 5-level paging support hpa@zytor.com - 2016-12-15 19:00 +0100
        Re: [RFC, PATCHv1 15/28] x86: detect 5-level paging support Borislav Petkov <bp@alien8.de> - 2016-12-15 20:10 +0100
          Re: [RFC, PATCHv1 15/28] x86: detect 5-level paging support hpa@zytor.com - 2016-12-15 22:00 +0100
          Re: [RFC, PATCHv1 15/28] x86: detect 5-level paging support hpa@zytor.com - 2016-12-15 22:20 +0100
          Re: [RFC, PATCHv1 15/28] x86: detect 5-level paging support Andi Kleen <ak@linux.intel.com> - 2016-12-15 23:20 +0100

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