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Re: [RFC 1/2] powerpc/32: Unset MSR RI in exception epilogs

From Segher Boessenkool <segher@kernel.crashing.org>
Newsgroups linux.kernel
Subject Re: [RFC 1/2] powerpc/32: Unset MSR RI in exception epilogs
Date 2016-12-13 20:50 +0100
Message-ID <sO1fj-5cf-9@gated-at.bofh.it> (permalink)
References <sNZZT-4x7-17@gated-at.bofh.it> <sNZZT-4x7-21@gated-at.bofh.it>
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On Tue, Dec 13, 2016 at 07:19:41PM +0100, Christophe Leroy wrote:
> At exception prologs, once SRR0 and SRR1 have been saved, MSR RI is
> set to mark the interrupt as recoverable.
> 
> MSR RI has to be unset before writing into SRR0 and SRR1 at exception
> epilogs.

Why?  What goes wrong without this?  Etc.


Segher

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[RFC 1/2] powerpc/32: Unset MSR RI in exception epilogs Christophe Leroy <christophe.leroy@c-s.fr> - 2016-12-13 19:30 +0100
  Re: [RFC 1/2] powerpc/32: Unset MSR RI in exception epilogs Segher Boessenkool <segher@kernel.crashing.org> - 2016-12-13 20:50 +0100
    Re: [RFC 1/2] powerpc/32: Unset MSR RI in exception epilogs christophe leroy <christophe.leroy@c-s.fr> - 2016-12-13 21:50 +0100
      Re: [RFC 1/2] powerpc/32: Unset MSR RI in exception epilogs Segher Boessenkool <segher@kernel.crashing.org> - 2016-12-14 00:00 +0100
        Re: [RFC 1/2] powerpc/32: Unset MSR RI in exception epilogs Peter Zijlstra <peterz@infradead.org> - 2016-12-14 09:50 +0100

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