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Groups > linux.kernel > #1541111
| From | <gabriel.fernandez@st.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | [PATCH v4 6/9] clk: stm32f4: Add SAI clocks |
| Date | 2016-12-13 15:30 +0100 |
| Message-ID | <sNWfE-2go-45@gated-at.bofh.it> (permalink) |
| References | <sNWfD-2go-3@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
From: Gabriel Fernandez <gabriel.fernandez@st.com>
This patch introduces SAI clocks for stm32f4 socs.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
---
drivers/clk/clk-stm32f4.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index a7a6a16..2bff436 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -948,6 +948,9 @@ static struct clk_hw *stm32_register_cclk(struct device *dev, const char *name,
static const char *i2s_parents[2] = { "plli2s-r", NULL };
+static const char *sai_parents[4] = { "pllsai-q-div", "plli2s-q-div", NULL,
+ "no-clock" };
+
struct stm32_aux_clk {
int idx;
const char *name;
@@ -983,6 +986,18 @@ struct stm32f4_clk_data {
NO_GATE, 0,
CLK_SET_RATE_PARENT
},
+ {
+ CLK_SAI1, "sai1-a", sai_parents, ARRAY_SIZE(sai_parents),
+ STM32F4_RCC_DCKCFGR, 20, 3,
+ STM32F4_RCC_APB2ENR, 22,
+ CLK_SET_RATE_PARENT
+ },
+ {
+ CLK_SAI2, "sai1-b", sai_parents, ARRAY_SIZE(sai_parents),
+ STM32F4_RCC_DCKCFGR, 22, 3,
+ STM32F4_RCC_APB2ENR, 22,
+ CLK_SET_RATE_PARENT
+ },
};
static const struct stm32f4_clk_data stm32f429_clk_data = {
@@ -1115,6 +1130,7 @@ static void __init stm32f4_rcc_init(struct device_node *np)
i2s_in_clk = of_clk_get_parent_name(np, 1);
i2s_parents[1] = i2s_in_clk;
+ sai_parents[2] = i2s_in_clk;
clk_register_fixed_rate_with_accuracy(NULL, "hsi", NULL, 0,
16000000, 160000);
--
1.9.1
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[PATCH v4 0/9] STM32F4 missing clocks <gabriel.fernandez@st.com> - 2016-12-13 15:30 +0100
[PATCH v4 4/9] clk: stm32f4: Add lcd-tft clock <gabriel.fernandez@st.com> - 2016-12-13 15:30 +0100
[PATCH v4 8/9] ARM: dts: stm32f4: Add external I2S clock <gabriel.fernandez@st.com> - 2016-12-13 15:30 +0100
[PATCH v4 7/9] clk: stm32f4: SDIO & 48Mhz clock management for STM32F469 board <gabriel.fernandez@st.com> - 2016-12-13 15:30 +0100
Re: [PATCH v4 7/9] clk: stm32f4: SDIO & 48Mhz clock management for STM32F469 board Stephen Boyd <sboyd@codeaurora.org> - 2016-12-22 01:20 +0100
[PATCH v4 6/9] clk: stm32f4: Add SAI clocks <gabriel.fernandez@st.com> - 2016-12-13 15:30 +0100
Re: [PATCH v4 6/9] clk: stm32f4: Add SAI clocks Stephen Boyd <sboyd@codeaurora.org> - 2016-12-22 01:20 +0100
[PATCH v4 2/9] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards <gabriel.fernandez@st.com> - 2016-12-13 15:30 +0100
Re: [PATCH v4 2/9] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards Stephen Boyd <sboyd@codeaurora.org> - 2016-12-22 01:20 +0100
[PATCH v4 3/9] clk: stm32f4: Add post divisor for I2S & SAI PLLs <gabriel.fernandez@st.com> - 2016-12-13 15:30 +0100
Re: [PATCH v4 3/9] clk: stm32f4: Add post divisor for I2S & SAI PLLs Stephen Boyd <sboyd@codeaurora.org> - 2016-12-22 01:20 +0100
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