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Groups > linux.kernel > #1538699

[RFC, PATCHv1 27/28] x86: enable la57 support

From "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Newsgroups linux.kernel
Subject [RFC, PATCHv1 27/28] x86: enable la57 support
Date 2016-12-08 17:30 +0100
Message-ID <sM9K4-8la-97@gated-at.bofh.it> (permalink)
References <sM9K2-8la-5@gated-at.bofh.it>
Organization linux.* mail to news gateway

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Most of things are in place and we can enable support of 5-level paging.
Things that known to be broken marked as BROKEN.

Not-yet-Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
---
 arch/x86/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index df4f1d514ab0..83a4c22111b3 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -309,6 +309,7 @@ config DEBUG_RODATA
 
 config PGTABLE_LEVELS
 	int
+	default 5 if X86_5LEVEL
 	default 4 if X86_64
 	default 3 if X86_PAE
 	default 2
@@ -1340,6 +1341,10 @@ config X86_PAE
 	  has the cost of more pagetable lookup overhead, and also
 	  consumes more pagetable space per process.
 
+config X86_5LEVEL
+	bool "Enable 5-level page tables support"
+	depends on X86_64
+
 config ARCH_PHYS_ADDR_T_64BIT
 	def_bool y
 	depends on X86_64 || X86_PAE
@@ -1698,6 +1703,7 @@ config X86_SMAP
 config X86_INTEL_MPX
 	prompt "Intel MPX (Memory Protection Extensions)"
 	def_bool n
+	depends on !X86_5LEVEL
 	depends on CPU_SUP_INTEL
 	---help---
 	  MPX provides hardware features that can be used in
-- 
2.10.2

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Thread

[RFC, PATCHv1 00/28] 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:30 +0100
  [RFC, PATCHv1 24/28] x86/mm: add sync_global_pgds() for configuration with 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:30 +0100
    Re: [RFC, PATCHv1 24/28] x86/mm: add sync_global_pgds() for  configuration with 5-level paging Andy Lutomirski <luto@amacapital.net> - 2016-12-08 19:50 +0100
      Re: [RFC, PATCHv1 24/28] x86/mm: add sync_global_pgds() for  configuration with 5-level paging "Kirill A. Shutemov" <kirill@shutemov.name> - 2016-12-08 20:40 +0100
  [RFC, PATCHv1 19/28] x86/mm: basic defines/helpers for CONFIG_X86_5LEVEL "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:30 +0100
  [RFC, PATCHv1 04/28] asm-generic: introduce <asm-generic/pgtable-nop4d.h> "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:30 +0100
  [RFC, PATCHv1 17/28] x86/mm: define virtual memory map for 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:30 +0100
    Re: [RFC, PATCHv1 17/28] x86/mm: define virtual memory map for  5-level paging Randy Dunlap <rdunlap@infradead.org> - 2016-12-08 20:00 +0100
      Re: [RFC, PATCHv1 17/28] x86/mm: define virtual memory map for  5-level paging "Kirill A. Shutemov" <kirill@shutemov.name> - 2016-12-08 20:30 +0100
  [RFC, PATCHv1 27/28] x86: enable la57 support "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:30 +0100
  [QEMU, PATCH] x86: implement la57 paging mode "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:30 +0100
    Re: [Qemu-devel] [QEMU, PATCH] x86: implement la57 paging mode no-reply@patchew.org - 2016-12-08 17:50 +0100
  [RFC, PATCHv1 28/28] TESTING-ONLY: bump TASK_SIZE_MAX "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:30 +0100
  [RFC, PATCHv1 03/28] arch, mm: convert all architectures to use 5level-fixup.h "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:30 +0100
  [RFC, PATCHv1 18/28] x86/paravirt: make paravirt code support 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:30 +0100
  [RFC, PATCHv1 07/28] x86: trivial portion of 5-level paging conversion "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:30 +0100
  [RFC, PATCHv1 01/28] asm-generic: introduce 5level-fixup.h "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:30 +0100
  [RFC, PATCHv1 26/28] x86/mm: add support for 5-level paging for KASLR "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:30 +0100
  [RFC, PATCHv1 06/28] x86: basic changes into headers for 5-level paging "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:40 +0100
  [RFC, PATCHv1 02/28] asm-generic: introduce __ARCH_USE_5LEVEL_HACK "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2016-12-08 17:40 +0100
  Re: [RFC, PATCHv1 00/28] 5-level paging Linus Torvalds <torvalds@linux-foundation.org> - 2016-12-08 19:20 +0100
    Re: [RFC, PATCHv1 00/28] 5-level paging hpa@zytor.com - 2016-12-08 19:30 +0100
    Re: [RFC, PATCHv1 00/28] 5-level paging "Kirill A. Shutemov" <kirill@shutemov.name> - 2016-12-08 20:30 +0100
  Re: [RFC, PATCHv1 00/28] 5-level paging Ingo Molnar <mingo@kernel.org> - 2016-12-09 06:10 +0100
    Re: [RFC, PATCHv1 00/28] 5-level paging Arnd Bergmann <arnd@arndb.de> - 2016-12-09 11:30 +0100
      Re: [RFC, PATCHv1 00/28] 5-level paging Catalin Marinas <catalin.marinas@arm.com> - 2016-12-09 12:00 +0100
    Re: [RFC, PATCHv1 00/28] 5-level paging "Kirill A. Shutemov" <kirill@shutemov.name> - 2016-12-09 11:40 +0100
      Re: [RFC, PATCHv1 00/28] 5-level paging Andi Kleen <ak@linux.intel.com> - 2016-12-09 17:50 +0100
        Re: [RFC, PATCHv1 00/28] 5-level paging "Kirill A. Shutemov" <kirill@shutemov.name> - 2016-12-09 18:30 +0100
      Re: [RFC, PATCHv1 00/28] 5-level paging Dave Hansen <dave.hansen@intel.com> - 2016-12-09 17:50 +0100

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