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[PATCH V2 5/5] ARM: BCM53573: Specify USB ports of on-SoC controllers

From Rafał Miłecki <zajec5@gmail.com>
Newsgroups linux.kernel
Subject [PATCH V2 5/5] ARM: BCM53573: Specify USB ports of on-SoC controllers
Date 2016-12-07 09:00 +0100
Message-ID <sLFiV-5Ca-5@gated-at.bofh.it> (permalink)
References <sLFiV-5Ca-7@gated-at.bofh.it>
Organization linux.* mail to news gateway

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From: Rafał Miłecki <rafal@milecki.pl>

Broadcom OHCI and EHCI controllers always have 2 ports each on the root
hub. Describe them in DT to allow specifying extra info or referencing
port nodes.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
 arch/arm/boot/dts/bcm53573.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/bcm53573.dtsi b/arch/arm/boot/dts/bcm53573.dtsi
index e2c496a..2da04d0 100644
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -124,6 +124,17 @@
 				reg = <0x4000 0x1000>;
 				interrupt-parent = <&gic>;
 				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				ehci_port1: port@1 {
+					reg = <1>;
+				};
+
+				ehci_port2: port@2 {
+					reg = <2>;
+				};
 			};
 
 			ohci: ohci@d000 {
@@ -133,6 +144,17 @@
 				reg = <0xd000 0x1000>;
 				interrupt-parent = <&gic>;
 				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				ohci_port1: port@1 {
+					reg = <1>;
+				};
+
+				ohci_port2: port@2 {
+					reg = <2>;
+				};
 			};
 		};
 
-- 
2.10.1

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[PATCH V2 5/5] ARM: BCM53573: Specify USB ports of on-SoC controllers Rafał Miłecki <zajec5@gmail.com> - 2016-12-07 09:00 +0100

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