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Groups > linux.kernel > #1533240
| From | Catalin Marinas <catalin.marinas@arm.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 9/9] arm64: Documentation - Expose CPU feature registers |
| Date | 2016-11-30 12:40 +0100 |
| Message-ID | <sJboZ-5v2-19@gated-at.bofh.it> (permalink) |
| References | <sH2zv-3q2-3@gated-at.bofh.it> <sH2zw-3q2-23@gated-at.bofh.it> <sJboZ-5v2-5@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Wed, Nov 30, 2016 at 04:44:52PM +0530, Siddhesh Poyarekar wrote: > On Thursday 24 November 2016 07:10 PM, Suzuki K Poulose wrote: > > + d) CPU Identification : > > + MIDR_EL1 is exposed to help identify the processor. On a > > + heterogeneous system, this could be racy (just like getcpu()). The > > + process could be migrated to another CPU by the time it uses the > > + register value, unless the CPU affinity is set. Hence, there is no > > + guarantee that the value reflects the processor that it is > > + currently executing on. The REVIDR is not exposed due to this > > + constraint, as REVIDR makes sense only in conjunction with the > > + MIDR. Alternately, MIDR_EL1 and REVIDR_EL1 are exposed via sysfs > > + at: > > + > > + /sys/devices/system/cpu/cpu$ID/regs/identification/ > > + \- midr > > + \- revidr > > + > > This doesn't seem to be implemented in this patchset. No. However, we merged the functionality above already and forgot about the documentation part, so we just clarify it now. -- Catalin
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Re: [PATCH 9/9] arm64: Documentation - Expose CPU feature registers Catalin Marinas <catalin.marinas@arm.com> - 2016-11-30 12:40 +0100
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