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Re: [PATCH v1 1/1] mfd: intel-lpss: Try to enable Memory-Write-Invalidate

From	Mika Westerberg <mika.westerberg@linux.intel.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH v1 1/1] mfd: intel-lpss: Try to enable Memory-Write-Invalidate
Date	2016-11-10 17:50 +0100
Message-ID	<sC0I1-h7-7@gated-at.bofh.it> (permalink)
References	<sBYZA-7y9-27@gated-at.bofh.it> <sBZ9g-7QM-25@gated-at.bofh.it> <sBZsB-7Yu-5@gated-at.bofh.it>
Organization	Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo

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On Thu, Nov 10, 2016 at 05:22:40PM +0200, Andy Shevchenko wrote:
> On Thu, 2016-11-10 at 16:59 +0200, Mika Westerberg wrote:
> > On Thu, Nov 10, 2016 at 04:51:42PM +0200, Andy Shevchenko wrote:
> > > Enable MWI mechanism if PCI bus master supports it.
> > 
> > Why?
> 
> It might be potential benefit in some cases. Documentation says that
> standard Memory Write might supply more current data than in the CPU
> modified cache line and "trashing a line in the cache may trash some
> data that is more current that in the memory line". This allows to avoid
> potential retries and other performance degradation issues on the bus.
> Though, I dunno how to measure it.
> 
> Would be enough to extend commit message by this paragraph?

That's better, yes.

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[PATCH v1 1/1] mfd: intel-lpss: Try to enable Memory-Write-Invalidate Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-11-10 16:00 +0100
  Re: [PATCH v1 1/1] mfd: intel-lpss: Try to enable  Memory-Write-Invalidate Mika Westerberg <mika.westerberg@linux.intel.com> - 2016-11-10 16:10 +0100
    Re: [PATCH v1 1/1] mfd: intel-lpss: Try to enable  Memory-Write-Invalidate Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-11-10 16:30 +0100
      Re: [PATCH v1 1/1] mfd: intel-lpss: Try to enable  Memory-Write-Invalidate Mika Westerberg <mika.westerberg@linux.intel.com> - 2016-11-10 17:50 +0100

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