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Groups > linux.kernel > #1518045
| From | Mark Rutland <mark.rutland@arm.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA |
| Date | 2016-11-09 12:30 +0100 |
| Message-ID | <sBzeP-6D4-71@gated-at.bofh.it> (permalink) |
| References | <sB5gJ-3TL-9@gated-at.bofh.it> <sB5gJ-3TL-7@gated-at.bofh.it> <sBdei-pw-15@gated-at.bofh.it> <sBnQm-7DS-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Wed, Nov 09, 2016 at 10:12:59AM +1100, Benjamin Herrenschmidt wrote: > On Tue, 2016-11-08 at 11:49 +0000, Mark Rutland wrote: > > I believe that we could theoretically have multiple independent LPC/ISA > > busses, as is possible with PCI on !x86 systems. If the current ISA code > > assumes a singleton bus, I think that's something that needs to be fixed > > up more generically. > > > > I don't see why we should need any architecture-specific code here. Why > > can we not fix up the ISA bus code in drivers/of/address.c such that it > > handles multiple ISA bus instances, and translates all sub-device > > addresses relative to the specific bus instance? > > What in that code prevents that today ? It appears I was mistaken w.r.t. the singleton comment. We can already translate MMIO->MMIO addresses per-instance (in the presence of a ranges property). The big change would be to handle !MMIO translations, for which we'd need a runtime registry of ISA bus instance to find the relevant accessor ops and instance-specific data. Thanks, Mark.
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[PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA "zhichang.yuan" <yuanzhichang@hisilicon.com> - 2016-11-08 04:30 +0100
Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA kbuild test robot <lkp@intel.com> - 2016-11-08 06:30 +0100
Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA kbuild test robot <lkp@intel.com> - 2016-11-08 06:30 +0100
Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA Mark Rutland <mark.rutland@arm.com> - 2016-11-08 13:00 +0100
Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA Arnd Bergmann <arnd@arndb.de> - 2016-11-08 17:30 +0100
Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA Mark Rutland <mark.rutland@arm.com> - 2016-11-08 18:20 +0100
Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk> - 2016-11-09 15:00 +0100
RE: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA Gabriele Paoloni <gabriele.paoloni@huawei.com> - 2016-11-09 16:00 +0100
Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA Arnd Bergmann <arnd@arndb.de> - 2016-11-09 22:40 +0100
Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA Benjamin Herrenschmidt <benh@kernel.crashing.org> - 2016-11-09 00:20 +0100
Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA Mark Rutland <mark.rutland@arm.com> - 2016-11-09 12:30 +0100
Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA Benjamin Herrenschmidt <benh@kernel.crashing.org> - 2016-11-10 08:20 +0100
Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA liviu.dudau@arm.com - 2016-11-09 12:50 +0100
RE: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA Gabriele Paoloni <gabriele.paoloni@huawei.com> - 2016-11-09 17:20 +0100
Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA "liviu.dudau@arm.com" <liviu.dudau@arm.com> - 2016-11-09 18:00 +0100
Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA "zhichang.yuan" <yuanzhichang@hisilicon.com> - 2016-11-10 07:30 +0100
RE: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA Gabriele Paoloni <gabriele.paoloni@huawei.com> - 2016-11-10 17:10 +0100
Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA "liviu.dudau@arm.com" <liviu.dudau@arm.com> - 2016-11-11 11:40 +0100
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