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Re: [PATCH v7 0/3] drm: add explict fencing

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On Tue, Nov 08, 2016 at 01:43:40PM +0100, Daniel Vetter wrote:
> On Tue, Nov 08, 2016 at 11:45:51AM +0000, Chris Wilson wrote:
> > On Tue, Nov 08, 2016 at 12:32:56PM +0100, Daniel Vetter wrote:
> > > On Tue, Nov 08, 2016 at 10:35:08AM +0000, Chris Wilson wrote:
> > > > On Tue, Nov 08, 2016 at 03:54:47PM +0900, Gustavo Padovan wrote:
> > > > > From: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
> > > > > 
> > > > > Hi,
> > > > > 
> > > > > This is yet another version of the DRM fences patches. Please refer
> > > > > to the cover letter[1] in a previous version to check for more details.
> > > > 
> > > > Explicit fencing is not a superset of the implicit fences. The driver
> > > > may be using implicit fences (on a reservation object) to serialise
> > > > asynchronous operations wrt to each other (such as dispatching threads
> > > > to flush cpu caches to memory, manipulating page tables and the like
> > > > before the flip).  Since the user doesn't know about these operations,
> > > > they are not included in the explicit fence they provide, at which point
> > > > we can't trust their fence to the exclusion of the implicit fences...
> > > 
> > > My thoughts are that in atomic_check drivers just fill in the fence from
> > > the reservation_object (i.e. the uapi implicit fencing part). If there's
> > > any additional work that's queued up in ->prepare_fb then I guess the
> > > driver needs to track that internally, but _only_ for kernel-internally
> > > queued work.
> > 
> > That's not a trivial task to work out which of the fence contexts within
> > the reservation object are required and which are to be replaced by the
> > explicit fence, esp. when you have to consider external fences.
> 
> Hm, what kind of async kernel tasks are you thinking off? Atm I don't know
> of anyone who does e.g. clflush through the gpu. And ttm bo placement
> moves for display should be explicit enough that drivers will deal with
> them correctly. At least that seems to have been the conclusion from the
> long amdgpu thread.

Now that we (i915) serialise on an reservation_object (obj->resv), we
have floated ideas to use that to serialise async tasks (such as
offloading the 100ms clflush to a (cpu) worker, a gpu task would pose a
similar problem with a fence inserted that is not exposed to userspace).
Also tempted to look at using async tasks + fences to do GTT updates
but that is not a common pain point at the moment, and cases where it
is the GTT thrashing itself is the issue.

So how does i915 deal with ttm bo fences?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

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[PATCH v7 0/3] drm: add explict fencing  Gustavo Padovan <gustavo@padovan.org> - 2016-11-08 08:00 +0100
  Re: [PATCH v7 0/3] drm: add explict fencing Chris Wilson <chris@chris-wilson.co.uk> - 2016-11-08 12:00 +0100
    Re: [PATCH v7 0/3] drm: add explict fencing Daniel Vetter <daniel@ffwll.ch> - 2016-11-08 12:40 +0100
      Re: [PATCH v7 0/3] drm: add explict fencing Chris Wilson <chris@chris-wilson.co.uk> - 2016-11-08 12:50 +0100
        Re: [PATCH v7 0/3] drm: add explict fencing Daniel Vetter <daniel@ffwll.ch> - 2016-11-08 13:50 +0100
          Re: [PATCH v7 0/3] drm: add explict fencing Chris Wilson <chris@chris-wilson.co.uk> - 2016-11-08 14:00 +0100
        Re: [PATCH v7 0/3] drm: add explict fencing Daniel Vetter <daniel@ffwll.ch> - 2016-11-08 14:00 +0100
  Re: [PATCH v7 0/3] drm: add explict fencing Daniel Vetter <daniel@ffwll.ch> - 2016-11-08 14:20 +0100

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