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Groups > linux.kernel > #1516238
| From | Radosław Pietrzyk <radoslaw.pietrzyk@gmail.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 1/6] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards |
| Date | 2016-11-07 16:00 +0100 |
| Message-ID | <sATyV-4uf-5@gated-at.bofh.it> (permalink) |
| References | <sARQt-3wK-5@gated-at.bofh.it> <sAS0c-3Aq-87@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
> +static struct clk_hw *clk_register_pll_div(const char *name,
> + const char *parent_name, unsigned long flags,
> + void __iomem *reg, u8 shift, u8 width,
> + u8 clk_divider_flags, const struct clk_div_table *table,
> + struct clk_hw *pll_hw, spinlock_t *lock)
> +{
> + struct stm32f4_pll_div *pll_div;
> + struct clk_hw *hw;
> + struct clk_init_data init;
> + int ret;
> +
> + /* allocate the divider */
> + pll_div = kzalloc(sizeof(*pll_div), GFP_KERNEL);
> + if (!pll_div)
> + return ERR_PTR(-ENOMEM);
> +
> + init.name = name;
> + init.ops = &stm32f4_pll_div_ops;
> + init.flags = flags;
Maybe it's worth to have CLK_SET_RATE_PARENT here and the VCO clock
should have CLK_SET_RATE_GATE flag and we can get rid of custom
divider ops.
> -static void stm32f4_rcc_register_pll(const char *hse_clk, const char *hsi_clk)
> +
> +static struct clk_hw *stm32f4_rcc_register_pll(const char *pllsrc,
> + const struct stm32f4_pll_data *data, spinlock_t *lock)
> {
> - unsigned long pllcfgr = readl(base + STM32F4_RCC_PLLCFGR);
> + struct stm32f4_pll *pll;
> + struct clk_init_data init = { NULL };
> + void __iomem *reg;
> + struct clk_hw *pll_hw;
> + int ret;
> +
> + pll = kzalloc(sizeof(*pll), GFP_KERNEL);
> + if (!pll)
> + return ERR_PTR(-ENOMEM);
> +
> + init.name = data->vco_name;
> + init.ops = &stm32f4_pll_gate_ops;
> + init.flags = CLK_IGNORE_UNUSED;
CLK_SET_RATE_GATE here
Moreover why not having VCO as a composite clock from gate and mult ?
According to docs SAI VCO (don't know about I2S ) must be within
certain range so clk_set_rate_range should be somewhere.
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[PATCH 0/6] Add STM32F4 missing clocks <gabriel.fernandez@st.com> - 2016-11-07 14:10 +0100
[PATCH 2/6] clk: stm32f4: SDIO & 48Mhz clock management for STM32F469 board <gabriel.fernandez@st.com> - 2016-11-07 14:10 +0100
Re: [PATCH 2/6] clk: stm32f4: SDIO & 48Mhz clock management for STM32F469 board Daniel Thompson <daniel.thompson@linaro.org> - 2016-11-07 15:00 +0100
Re: [PATCH 2/6] clk: stm32f4: SDIO & 48Mhz clock management for STM32F469 board Gabriel Fernandez <gabriel.fernandez@st.com> - 2016-11-07 15:10 +0100
[PATCH 3/6] clk: stm32f4: Add post divisor for I2S & SAI PLLs and Add lcd-tft clock <gabriel.fernandez@st.com> - 2016-11-07 14:10 +0100
Re: [PATCH 3/6] clk: stm32f4: Add post divisor for I2S & SAI PLLs and Add lcd-tft clock Daniel Thompson <daniel.thompson@linaro.org> - 2016-11-07 15:00 +0100
Re: [PATCH 3/6] clk: stm32f4: Add post divisor for I2S & SAI PLLs and Add lcd-tft clock Gabriel Fernandez <gabriel.fernandez@st.com> - 2016-11-07 15:20 +0100
[PATCH 4/6] clk: stm32f4: Add I2S clock <gabriel.fernandez@st.com> - 2016-11-07 14:10 +0100
Re: [PATCH 4/6] clk: stm32f4: Add I2S clock Daniel Thompson <daniel.thompson@linaro.org> - 2016-11-07 15:20 +0100
Re: [PATCH 4/6] clk: stm32f4: Add I2S clock Gabriel Fernandez <gabriel.fernandez@st.com> - 2016-11-08 17:30 +0100
[PATCH 6/6] arm: dts: stm32f4: Add external I2S clock <gabriel.fernandez@st.com> - 2016-11-07 14:20 +0100
[PATCH 5/6] clk: stm32f4: Add SAI clocks <gabriel.fernandez@st.com> - 2016-11-07 14:20 +0100
[PATCH 1/6] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards <gabriel.fernandez@st.com> - 2016-11-07 14:20 +0100
Re: [PATCH 1/6] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards Gabriel Fernandez <gabriel.fernandez@st.com> - 2016-11-07 15:10 +0100
Re: [PATCH 1/6] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards Radosław Pietrzyk <radoslaw.pietrzyk@gmail.com> - 2016-11-07 16:00 +0100
Re: [PATCH 1/6] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards Gabriel Fernandez <gabriel.fernandez@st.com> - 2016-11-08 09:40 +0100
Re: [PATCH 1/6] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards Radosław Pietrzyk <radoslaw.pietrzyk@gmail.com> - 2016-11-08 10:00 +0100
Re: [PATCH 1/6] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards Gabriel Fernandez <gabriel.fernandez@st.com> - 2016-11-08 17:30 +0100
Re: [PATCH 1/6] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards Radosław Pietrzyk <radoslaw.pietrzyk@gmail.com> - 2016-11-09 09:20 +0100
Re: [PATCH 1/6] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards Gabriel Fernandez <gabriel.fernandez@st.com> - 2016-11-09 11:00 +0100
Re: [PATCH 1/6] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards Daniel Thompson <daniel.thompson@linaro.org> - 2016-11-07 18:50 +0100
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